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http://www.anandtech.com/show/6936/intels-silvermont-architecture-revealed-getting-serious-about-mobile http://www.tomshardware.com/reviews/atom-silvermont-architecture,3499.html Some news on the Atom front today.
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May 6, 2013 18:26
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Validation engineer here. The tests for stability that overclockers run may get lucky and actually exercise some speedpaths for certain operations but you are probably not hitting the speedpaths of the whole chip unless you exercise all the features, which you really can't do without intimate knowledge of the platform and how to program it. You need to know what the actual slowest paths in the chip are and you need directed tests for those paths and you need to run them with the chip heated up way above normal temperatures or cooled to freezing and and then you've got a good place to start for speed binning. Without knowing the actual worst paths through the chip (which is a job for a whole department by itself) you'll run into things where changing the screen resolution or a cache miss or putting the mouse in the wrong place on the screen triggers an actual slower path and it crashes for no apparent reason. The space is just to big to cover without directed tests. If you could do it with any amount of luck and randomization I wouldn't have a job. EIDE Van Hagar fucked around with this message at 05:55 on Jun 7, 2013 |
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Jun 7, 2013 05:31
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MrYenko posted:As an aside, can anyone identify the person responsible for USB having a rectangular form factor, that you can almost, but not quite plug in upside down, when you're feeling around the back of a case with limited access? https://www.youtube.com/watch?v=qfHzzy6T9to
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Feb 20, 2015 16:02
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HERAK posted:I still find it hilarious that most of America hasn't succumbed to some sort of massive electrical fire and that you are willing to accept such comparatively low standards for your household wiring. No but they announced this today that can basically eliminate dram in some applications: http://www.wired.com/2015/07/3d-xpoint/
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Jul 29, 2015 00:22
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Tablets and phones are the perfect use case if the price is right. *Reduced BOM cost from single package replacing NAND and DRAM *Reduced power usage from not refreshing DRAM and the fact that it's a single package *No need for the super high-end DRAM speeds because it's a tablet *Super fast suspend and restore for deeper sleep modes because you don't have to worry about preserving RAM contents
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Jul 29, 2015 16:39
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Skandranon posted:If they can produce it economically, everything has a good use case for this. Why not blow away the entire SSD & HD market and own it all. Intel could effectively become the only game in town for storage, if it's as good as they say and isn't cost prohibitive. There is some actual good reporting from the register here: http://www.theregister.co.uk/2015/07/29/having_a_looks_at_imtfs_crosspoint/ Notably they have a couple slides from a micron presentation from 2011 that might be the same tech and a hint that there might be a performance version and a cheaper consumer version.
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Jul 29, 2015 20:55
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CPU L1-L3 cache will usually be on-die SRAM so it will be much faster than DRAM. Even in a system where 3d xpoint replaced DRAM you would still see improvements in speed with more caching because SRAM is so fast. GPUs will also need very fast access to a framebuffer when rendering, that's why tiled memory was a thing (trying to avoid a DRAM page walk), but mostly now it's just very very fast DRAM and you'll still need very fast memory to get good GPU performance. You would see things like loading screens where a bunch of stuff is pulled from the disk into DRAM go away though.
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Jul 31, 2015 00:43
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In fact, here's an article that details some patents for use 3d xpoint usecases. The author of the article thinks it will be faster than DDR3 but slower than DDR4, based on patents for replacing DRAM with xpoint in CPU memory systems and supplementing it with DDR4 or DDR5 in GPU systems where the extra speed of DDR4 or DDR5 is needed. http://www.dailytech.com/Exclusive+If+Intel+and+Microns+Xpoint+is+3D+Phase+Change+Memory+Boy+Did+They+Patent+It/article37451.htm
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Jul 31, 2015 01:39
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Durinia posted:This is true, but that's also assuming that the software momentum of current PCs will outweigh the software momentum of Android/iOS. ARM is already starting to eat into the laptop market (slowly), but PCs are kind of the last bastion where it's x86 or GTFO. ARM designs are making an end-run around it and going straight for server market where that momentum is less of an issue (and the market is actually not shrinking like PCs). Except that every arm server thing to date has been vaporware.
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Aug 27, 2015 17:21
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Twerk from Home posted:That's not entirely true, isn't HP shipping Moonshot servers with ARM modules available for a while? Something like this: http://www8.hp.com/us/en/products/proliant-servers/product-detail.html?oid=7398907#!tab=specs And these sold so well that hp server revenue fell by 12% or something and then they released a xeon version.
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Aug 27, 2015 17:30
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evilweasel posted:ARM was effective competition in that Intel saw it coming and started working to counter it. It's unlikely they would have gone on the power-savings kick as early as they did without the threat of ARM. Since there's a large market for ARM chips outside of computers it will stay as a potential threat if Intel fails to deliver, while perhaps not actually moving into intel markets in any real force. Sort of a chip-in-being strategy. There is no question that arm is the competition for intel now in a way that amd is not anymore. Just look at surface 3.
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Aug 27, 2015 22:07
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Subjunctive posted:DisplayPort carries audio, no? displayport should carry audio EIDE Van Hagar fucked around with this message at 06:51 on Dec 13, 2015 |
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Dec 10, 2015 16:44
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Methylethylaldehyde posted:That's super clever for an early run. As long as you have die space, adding little FPGA-style modular bits could save your rear end if something bad happened. Its not an fpga, in that it is not programmable in the field. its just extra logic gates that aren’t hooked up to metal routing at all unless you make new metal layer masks. It just means you don’t have to do place and route for the base layers (FEOL) again, you still have to make a new copy of the chip with the new metal layers. The ECO process at intel works exactly like that except no need to early extra wafers from the foundry in advance because you are the foundry. Just place a few lots on hold after FEOL.
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Jul 6, 2018 01:22
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Also most design rules these days just don’t allow for blank space at all. Having a large area of just open silicon during etch steps can affect the etch rate of the areas around it, Also, a lot of photo masks also depend on repeating features because they use diffraction from nearby features to accurately produce a feature. You might need to throw in some “dummy” transistors anyway just to make the photo pattern for your real transistors work out, so you might as well just make some spare real transistors if you can.
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Jul 6, 2018 03:36
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