|
WhyteRyce posted:Designs a board to be showed off in a windowed case Maybe the cables can have some kind of lighting, lol
|
#
?
Jan 12, 2021 00:38
|
|
|
|
| # ? Apr 28, 2024 11:23 |
|
|
priznat posted:I like the right angle edge power connections. Also sff-8644 connector! Thats slightly insane given the 2 memory slots and also lack of pcie. Oddness!
|
|
#
?
Jan 12, 2021 01:02
|
|
|
DrDork posted:TBQH, now that boards are coming with 2 or more NVMe slots, decent quality built-in sound cards, wi-fi cards, and so on, I'm really struggling to find much of a need for more than 2 slots in most cases (GPU + high-speed NIC). I use, GFX (2 slot), Capture card 1x slot, PCIe to PCI bridge, 2- 1x slots. Video capture 1x slot, and sometimes a PCIe NVMe beefcake ssd 4x slot, on and also 10GBe at some point.
|
|
#
?
Jan 12, 2021 01:05
|
|
|
Yeah, I know it's certainly possible to fill up a mess of PCIe slots, but I don't think the market those boards are hunting for are really gonna be the type to do so. I've got a NAS that is entirely run out of slots because it's got a GPU, PCIe -> 4x NVMe adapter, 10Gb SFP+ NIC, HBA card, PCIe -> NVMe/SATA adapter, and at least one or two other things I'm forgetting about right now. But I wouldn't run that trash on a $1000 uber-OC board--what would the point be? Honestly I'd bet 90% of boards sold to DIY buyers these days never have anything other than a single GPU + 1-2 M.2 slots populated. DrDork fucked around with this message at 01:10 on Jan 12, 2021 |
|
#
?
Jan 12, 2021 01:08
|
|
|
redeyes posted:Thats slightly insane given the 2 memory slots and also lack of pcie. Oddness! Could be SATA, most likely it is south bridge gen3 pcie x4.
|
|
#
?
Jan 12, 2021 01:09
|
|
|
there are 2-slot blower Ampere cards  a lot of people use risers w/ cables to mount bigger cards anyway
|
|
#
?
Jan 12, 2021 01:09
|
|
|
I liked it better when boards didn't shroud the heatsinks so much.
|
|
#
?
Jan 12, 2021 01:57
|
|
|
its-happening.gif.vbs Intel graphics chip will tap new version of TSMC 7-nanometer process: sources quote:(Reuters) - Intel Corp plans to tap Taiwan Semiconductor Manufacturing Co to make a second generation discrete graphics chip for personal computers that it hopes will help it combat the rise of Nvidia Corp, two sources familiar with the matter told Reuters. Roundtable with tech media today: https://www.anandtech.com/show/1636...m_medium=social Paul MaudDib fucked around with this message at 07:11 on Jan 12, 2021 |
|
#
?
Jan 12, 2021 06:54
|
|
|
Paul MaudDib posted:its-happening.gif.vbs Is that the one for datacenters / video transcode / surveillance farms?
|
|
#
?
Jan 12, 2021 07:24
|
|
|
Z590 Dork
|
|
#
?
Jan 12, 2021 15:01
|
|
|
Paul MaudDib posted:its-happening.gif.vbs oh loving boy I’m extremely looking forward to TSMC being even *more* overloaded than they already are
|
|
#
?
Jan 13, 2021 10:18
|
|
|
I'm sure they'll just do what Hermione did with that time-bending trinket in one of the Harry Potter books to produce three years' worth of 7nm product in six months' time for, what, *four* highly demanding customers now?
|
|
#
?
Jan 13, 2021 10:23
|
|
|
Kazinsal posted:oh loving boy I’m extremely looking forward to TSMC being even *more* overloaded than they already are What I find amazing is the story of Jim "silicon valley cowboy" Keller. AMD called him in the early '00s and asked for a CPU that could beat Intel, he delivered. Apple called and asked for an awesome mobile chip, he delivered. AMD called again with a literal dumpster fire and Keller somehow handed Ryzen to AMD. Tesla called asking for self driving cars and by gawd they got self driving murder machines mowing down pedestrians left and right. Finally, Intel called up Keller and Keller stepped up the plate, then promptly noped the hell out of there  .
|
|
#
?
Jan 13, 2021 15:15
|
|
|
Return of the king baby! PAT IS BACK Intel CEO Bob Swan to step down in February, VMware CEO Pat Gelsinger to replace him https://www.cnbc.com/2021/01/13/intel-ceo-bob-swan-to-step-down-in-february.html?__source=androidappshare
|
|
#
?
Jan 13, 2021 15:22
|
|
|
That's huge good news for Intel Pats been gone long enough though that I'll wonder how many head slaps he'll do when he comes back
|
|
#
?
Jan 13, 2021 16:37
|
|
|
wet_goods posted:Return of the king baby! Kicking rad.
|
|
#
?
Jan 13, 2021 16:39
|
|
|
|
|
#
?
Jan 13, 2021 16:43
|
|
|
Save me senpai
|
|
#
?
Jan 13, 2021 17:02
|
|
|
wet_goods posted:Return of the king baby! lolwat???? Was the Itanium just really misunderstood or something?
|
|
#
?
Jan 13, 2021 17:42
|
|
|
Not Wolverine posted:Pat Gelsinger in his CTO role, with Intel Itanic 2 It certainly didn't get the market penetration they were hoping for, if that's what you mean.
|
|
#
?
Jan 13, 2021 18:10
|
|
|
Not Wolverine posted:lolwat???? Was the Itanium just really misunderstood or something? Nah it was an EPIC fail
|
|
#
?
Jan 13, 2021 18:36
|
|
|
Not Wolverine posted:Pat Gelsinger in his CTO role, with Intel Itanic 2 Hardware guys: it's OK, the software guys will write compilers for this
|
|
#
?
Jan 13, 2021 18:45
|
|
|
MaxxBot posted:Nah it was an EPIC fail  movax posted:Hardware guys: it's OK, the software guys will write compilers for this
|
|
#
?
Jan 13, 2021 18:52
|
|
|
movax posted:Hardware guys: it's OK, the software guys will write compilers for this all we need is a Sufficiently Smart Compiler 
|
|
#
?
Jan 13, 2021 18:53
|
|
|
people apparently thought well of him in 2005/2006quote:Intel made billions but many billions more were missed, great products were killed, and marketing took over Intel. I’ll give Ottellini credit – he’s taken hold of the CPU side and made it a company priority again. We no longer hear that CPUs are “on the way out like memory was in the 80's.” We hear that great CPUs are important, and resources are being lined up behind winning designs. And he finally put a real technical guy (Pat Gelsinger) in charge of CPU development. he also apparently oversaw the development of the 486 architecture.
|
|
#
?
Jan 13, 2021 19:05
|
|
|
Is there a tl;dr on Itanium? Why does this processor - that isn't even widely used - exist in the first place?
|
|
#
?
Jan 13, 2021 19:07
|
|
|
Everyone knew 32 bit was coming to an end. They decided to do a blank sheet redesign. Something that they hadn’t licensed out to AMD, etc, and they wanted to kill all the risc unix processor workstation vendors. Bad organizational politics also some bad assumptions about compilers, etc.
|
|
#
?
Jan 13, 2021 19:19
|
|
|
in a rare use of monopoly power for the common good, Microsoft looked at Itanium, said "lol gently caress you" and wrote 64-bit Windows on AMD's x64 design (though some versions of Windows Server did run on IA-64)
|
|
#
?
Jan 13, 2021 19:56
|
|
|
Gabriel S. posted:Is there a tl;dr on Itanium? Why does this processor - that isn't even widely used - exist in the first place? the theory was that the compiler knows best and can pack instructions in a dense way to pretty optimally use the execution resources, so you go to a VLIW where there are multiple instructions in a single packed word. The processor won't have to do a bunch of introspection into what is going on in the data/control flow in order to work, because the compiler knows what's going on at a higher, program level, and you're just jamming a near-optimal instruction stream into the processor. In turn the whole design gets a lot simpler to implement on the hardware side. It turns out that's basically all wrong and most code doesn't really expose a ton of parallelism that VLIW can exploit well, and compilers can't actually do the thing. It turns out that in practice, the processor doing introspection on the program as it's running is more accurate than a compiler can be just looking at it from an eagle's view. Plus, while run-time out-of-order and superscalar isn't easy, it's at least easier to implement than a Sufficiently Smart Compiler turned out to be. it turned out to be a giant architectural mis-step that basically never caught the huge traction it was supposed to and fizzled. in practice it ended up basically being the hardware people throwing their problems over the wall at software people and demanding a magic compiler. From what I remember there were actually some compiler improvements over the life of the architecture but it never ended up being enough to catch up with the improvements made in OoO/speculation. And then the whole thing turned into a death cycle, where Itanium wasn't performing well, so no one wanted it, so it didn't get leading edge nodes, so it didn't perform well, etc. from what I remember there are some neat systems built on top of Itanium in terms of reliability, mostly by HP, but ultimately you can build cool resilient systems on any architecture. But the niche it found was definitely business-facing stuff, not consumer/workstation/etc. Alternatives in similar market niches would be things like Alpha or SPARC or IBM System Z more or less (depending on era). And those are all much more conventional designs for a server/workstation CPU. Paul MaudDib fucked around with this message at 21:20 on Jan 13, 2021 |
|
#
?
Jan 13, 2021 20:01
|
|
|
Considering out-of-order and speculation led to the side-channels galore that we'll never see the end of and which has caused sizable sacrifices in performance just to not leak all data everywhere, I'm not entirely convinced our current model is strictly better than Explicitly Parallel Instruction Computing.
|
|
#
?
Jan 13, 2021 20:09
|
|
|
Paul MaudDib posted:people apparently thought well of him in 2005/2006 If I remember my lore he was well regarded before he left and was groomed to be the next CEO. But either he thought Paul was freezing him out or he thought it would take too long too get there so he jumped ship and Intel had to scramble when Paul announced his retirement after completely missing the boat on mobile. You might be able to argue the disruption to that line of succession was the start of Intels slide
|
|
#
?
Jan 13, 2021 20:58
|
|
|
Charlie D likes him https://twitter.com/CDemerjian/status/1349387438653894660
|
|
#
?
Jan 13, 2021 21:29
|
|
|
Gabriel S. posted:Is there a tl;dr on Itanium? Why does this processor - that isn't even widely used - exist in the first place? In the 1980s, like virtually all companies selling UNIX workstations and servers at the time, HP invented its own RISC ISA, PA-RISC. It was reasonably successful. In the 1990s, HP CPU architects and management became convinced of two things: one, companies like HP weren't going to be able to succeed with proprietary ISAs for much longer (hindsight: correct!) and two, out-of-order superscalar microarchitectures loosely based on Tomasulo's algorithm would die off because they were soon to become too hard to develop further (hindsight: LOL no!). HP addressed the first problem by hooking up with Intel and offering to co-create what both hoped would become the dominant 64-bit ISA of the next twenty years. Other companies would be able to buy the processors, but HP would enjoy a kind of most-favored-customer / co-creator status. HP (and later HP+Intel) addressed the second by brainstorming up a bunch of post-RISC, post-VLIW ideas for a new CPU architecture. This went... poorly. Itanium is incredibly overcomplicated and plain weird. It's a kitchen sink's worth of questionably brilliant ideas. ------ OK, TLDR section over, let's get into what specifics I can remember as a person who never touched Itanium personally, but viewed the train wreck from afar with awe and appreciation I said post-VLIW. While HP's architects included Josh Fisher (the father of VLIW), Itanium isn't really one. In a true VLIW, there's extremely tight coupling between the instruction word format and the processor core, because the idea is to have essentially no control logic. In VLIW, if your instruction word encodes eight instruction fields, that means you have eight execution units, and slot #N in your instruction word always feeds EU #N. Furthermore, the whole word dispatches on the same cycle, and there usually few or no hazard interlocks. VLIW's whole thing is "let's avoid having messy difficult control logic by pushing all the scheduling burden onto the compiler". This means a true VLIW is useless as a general purpose processor for personal computers or servers. As soon as you need to change the processor core much, you also must change the instruction word format, so it's really a whole new architecture. Binary compatibility from generation to generation is basically not a thing in VLIW. There do still exist true VLIW cores to this day, but typically they're deeply embedded DSPs where you want the low control logic overhead and don't give a poo poo about bincompat. So, that's not what Itanium did. They aimed for a middle ground where the processor didn't have to be as smart about scheduling as it would be on a conventional OoO RISC core, but bincompat could still be a thing. So what they decided to do was to encode extra information into the instruction stream. There are marker bits to identify the start and end of instruction groups which have no internal dependencies, meaning it's safe to launch them all on the same cycle. This is the "Explicitly Parallel" referred to in the EPIC acronym. Where do those marker bits go? The solution in Itanium is to encode three instructions into one 128-bit "bundle". The instructions don't need all 128 bits, so there are some left over to mark the non-dependent groups. Unlike VLIW, non-dependent groups can span bundles, and there's no guaranteed 1:1 correspondence between hardware EUs and slots in the bundle. They were trying to define an architecture which got some of the benefits of VLIW without preventing bincompat and so forth. One cost of this was encoding density. VLIWs are really horrible for that, because compilers have to insert explicit no-ops to make sure that EUs are idle when they should be idle. But Itanium wasn't a lot better - there were some weird rules about what bundle slots could be used for which purpose under various circumstances, so lots of bundles end up containing one or two no-ops. And I haven't even begun to talk about other stuff I've forgotten all about since I never really touched the thing. I remember some weird poo poo about rotating register files, and that the register file was loving HUGE. I think it might have been 128 registers?
|
|
#
?
Jan 14, 2021 07:18
|
|
|
FuturePastNow posted:in a rare use of monopoly power for the common good, Microsoft looked at Itanium, said "lol gently caress you" and wrote 64-bit Windows on AMD's x64 design (though some versions of Windows Server did run on IA-64) I think you're confusing Itanium history with x86. Microsoft was on board with Itanium early, and even ported client Windows to it. This is probably the sequence of events you're remembering. 1. AMD released the AMD64 spec to the public and committed to delivering physical implementations in a few years. 2. Microsoft said cool, we'll port Windows, 64-bit x86 would be dope (Itanium windows was already a thing at this point but Itanium wasn't doing well) 3. As AMD64 drew closer to reality and it became increasingly clear AMD's products were gonna kick both P4 and Itanium butt, Intel realized the dream of monopolizing 64-bit computing with Itanium was already dead and they'd have to do something fast 4. Surprise, motherfucker! Intel drops their own 64-bit x86 spec on Microsoft and asks MS to port to that instead of or in addition to AMD's. It was a skunk works project that had existed for a long time, but was kept secret because until then Intel senior management was fully committed to going down with the Itanic. 5. This is where Microsoft told Intel to gently caress off. They were already knee-deep in AMD64 work and did not want to abandon it or fragment the x86 market just because of Intel's internal failures. 6. Intel gave in and adopted most of AMD's version of 64b x86. (there were minor differences in privileged mode instructions, but the user-mode ISA was identical)
|
|
#
?
Jan 14, 2021 07:26
|
|
|
I love how this shows him holding every Itanium 2 ever sold.
|
|
#
?
Jan 14, 2021 10:10
|
|
|
Gamers Nexus dropped a news video on Intel - B560 and H570 motherboards will support memory overclocking (on top of Z590 which was already expected to). You'll still need a Z590 board and a K-model processor for CPU overclocking, but being able to run 3200 MHz or whatever higher memory speed you have, even on a locked i3* or i5, should help it compete. - All of the 500-series motherboards (Z590, H570, B560, H510) will support 10th gen / Comet Lake CPUs. - Z490 and H470 motherboards will support 11th gen / Rocket Lake CPUs. As far as I could tell, whether or not you'll be able to get PCIe gen 4.0 on Z490 board running a Rocket Lake CPU is still murky. - B460 and H410 motherboards will NOT support 11th gen / Rocket Lake CPUs, even if these boards are still supposed to be on the LGA1200 socket. ___ * it's rumored elsewhere that the Celeron, Pentium, and i3 SKUs for 11th gen will simply be Comet Lake refreshes, and only i5, i7, and i9 processors will be on the Rocket Lake architecture. That would presumably hurt the i3 segment if being on Comet Lake means its far less powerful than the next step up to the i5, even if you could put it on a B560 and optimize the memory speed.
|
|
#
?
Jan 14, 2021 11:21
|
|
|
BobHoward posted:And I haven't even begun to talk about other stuff I've forgotten all about since I never really touched the thing. I remember some weird poo poo about rotating register files, and that the register file was loving HUGE. I think it might have been 128 registers? If you really want the deets, The Old New Thing has a multi-part retrospective here  Another factor with making a 'simple' in-order processor was Intel gambling that a) OoO would top out in terms of maximum clock soon from the complexity and b) making a simple processor means you can clock it really, really high. The former turned out to be wrong, the latter, well, they never even achieved the initial predicted clocks anywhere near on time (also you gotta actually make the processor simple!), but then the idea smashed into the decline of Moore's Law (speed-wise anyway) that also killed off the Pentium IV. The latter were originally predicted to hit 10GHz! feedmegin fucked around with this message at 13:05 on Jan 14, 2021 |
|
#
?
Jan 14, 2021 13:01
|
|
|
We're starting to get some leaks of 11th gen parts:   pre:https://twitter.com/momomo_us/status/1349745412874256384 https://twitter.com/harukaze5719/status/1348756215602450433 https://twitter.com/momomo_us/status/1349737077936513024
|
|
#
?
Jan 14, 2021 17:04
|
|
|
Kinda tempted to go for the 11900k to replace my matx 5820K setup, I was tempted with a ryzen 5000 but you have an option of like 2 matx amd boards. Wheras there are always more options on Intel. I should just get a normal atx case lmao
|
|
#
?
Jan 14, 2021 17:14
|
|
|
|
| # ? Apr 28, 2024 11:23 |
|
|
Does the 11400 make more sense this time around, compared to the 10400? I remember reading that they'll run DDR3200 now. Putting together a cheapish gaming system for a friend this spring and it seems like a good deal.
|
|
#
?
Jan 14, 2021 18:56
|
|