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I'd love to avail myself of the collected expertise here, and pick everyone else's brains for options I may not have considered: If you have an 8AWG stranded wire that needs to neck down to a 20AWG terminal, how would you do it? Would you strip away excess strands until you had something that fits, or is there some kind of black-magic splice that you could do between an 8AWG wire and a 20AWG wire? The reason I have this issue is because I'm trying to get power and data through the same cable, so I am trying to use an off-the-shelf cable with 4 conductors in the same jacket, and 2 of them are way too chonky.
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Dec 1, 2021 19:04
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Check YouTube for the NASA style cable splicing method. It's fairly gauge agnostic
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Dec 1, 2021 19:50
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ante posted:Check YouTube for the NASA style cable splicing method. It's fairly gauge agnostic Huh, I had no idea my "just twist the wires around each other a bunch first" method was NASA approved 
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Dec 1, 2021 21:54
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Oh, I misread the question entirely. Intermediate wire seems safer, less likely to pop out of the terminal. Just my impression though. Professionally, though, I've had to use an extra set of intermediate terminal blocks, it was a huge pain in the dick
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Dec 1, 2021 21:58
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When I installed light poles, sometimes we'd run #6 or bigger wire for 15A circuits just to deal with voltage drop. In that case, there'd be the #6 or #4 or whatever in the panel, then some kind of connection (split bolt, Magic Hydraulic Crimp Solution :r: :tm:, a wire nut) to a normal #12 or #10, which is then landed on the breaker. I'm confident TE makes something that crimps #8 to #20 for probably $4 per crimp using a $60 die in a $400 tool. If you've got the physical space around the terminal, you can also get a #8 ferrule with a #20 pin on it.
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Dec 1, 2021 22:54
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I wanna make a negative voltage rail for an opamp with stuff lying around the house. Is this an okay design? It works alright in LTSpice: Input is the -9V on the left, and it gives me a very nice -6.9V at Vss. I need anything from -6V up (or down I guess technically), I just picked a voltage divider of 10K and 5K because I can make 5K out of two parallel 10K's and I have a hell of a lot of low-tempco 10K resistors. The 1K on the output at the far right is just to simulate approximately what I'd expect the load to look like. I've never used a TL431 to regulate a negative voltage before, nor have I used a pass transistor like this either, so I figured I'd check before I commit to it. I realize the transistor isn't in the feedback loop of the TL431 at all (couldn't figure out how to do that) so I'm just kinda relying on it being stable, does the voltage drop across a transistor change much with temperature or age? Honestly I could probably just use the straight -9V since it's coming from a battery, but I'd rather not have the voltage change as the battery slowly runs down as it might subtly affect other stuff. Shame Boy fucked around with this message at 16:47 on Dec 3, 2021 |
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Dec 3, 2021 16:45
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Shame Boy posted:I wanna make a negative voltage rail for an opamp with stuff lying around the house. Is this an okay design? It works alright in LTSpice: I think if you move the lead of R3 from the base of the pass transistor to the emitter you take Vbe variation out of the picture entirely. Current gain is not a well-controlled parameter and changes quite a bit over temperature and there is also internal resistance as well. Moving the feedback to the output gives you a way to ignore all of that.
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Dec 3, 2021 19:21
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Stack Machine posted:I think if you move the lead of R3 from the base of the pass transistor to the emitter you take Vbe variation out of the picture entirely. Current gain is not a well-controlled parameter and changes quite a bit over temperature and there is also internal resistance as well. Moving the feedback to the output gives you a way to ignore all of that. Yeah, the positive version of this circuit has it wired like that, but I found if I try to do that with this circuit the voltage doesn't really... make sense. It's a good 2 volts lower (in absolute value) than the equivalent positive circuit, and while the positive circuit is rock stable with load this varies by hundreds of millivolts even with relatively small changes in load. That's what I meant about not knowing how to work it into the feedback loop. I mean maybe it's an artifact of LTSpice but it's suspicious. Here's the two side-by-side:  And here's the output as the load on both of them is stepped from 10K to 5K to 1K to 500:  e: Thinking about the path the current follows in the positive one, the feedback is "after" the transistor, whereas in the negative one it's "before" the transistor. But if it were moved "after" the transistor it'd just be tied to the -9V rail... e2: also R1 has ~3 times the current flowing through it on the negative one than the equivalent R7 on the positive one... Shame Boy fucked around with this message at 19:54 on Dec 3, 2021 |
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Dec 3, 2021 19:45
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I wonder if your compensation is just waay too slow. Maybe try a smaller value of C3 or C3 from the middle of the divider to ground instead of back to the base? E: upon further reflection, I think C3 is working as compensation for U1 in this design, exploiting the miller effect. It will be much faster (but possibly unstable, so you may have to adjust the value) if you ground it instead. Speeding up the loop means the regulator responds to load steps faster so you should have better-looking transient responses or be able to use a smaller output capacitor. Stack Machine fucked around with this message at 20:44 on Dec 3, 2021 |
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Dec 3, 2021 20:21
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Stack Machine posted:I wonder if your compensation is just waay too slow. Maybe try a smaller value of C3 or C3 from the middle of the divider to ground instead of back to the base? C3 was in the TL431 datasheet I got the positive circuit from, and that circuit's working fine. C1 is me attempting to duplicate it on the negative side. Removing both of them changes how fast it settles into its final voltage but otherwise the behavior's more or less the same. Connecting the other side of C3 to ground makes the positive circuit oscillate like crazy, whereas doing the same with C1 doesn't visibly affect anything. e: Oh duh of course doing it to C1 isn't gonna visibly affect anything, it's already connected to ground
Shame Boy fucked around with this message at 20:39 on Dec 3, 2021 |
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Dec 3, 2021 20:34
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I cleaned it up and reorganized it a bit and got rid of C1 and C3 since they weren't really doing much in the simulation: Output looks like this (note the colors are reversed from the last graph I posted):  Stack Machine posted:E: upon further reflection, I think C3 is working as compensation for U1 in this design, exploiting the miller effect. It will be much faster (but possibly unstable, so you may have to adjust the value) if you ground it instead. Speeding up the loop means the regulator responds to load steps faster so you should have better-looking transient responses or be able to use a smaller output capacitor. To be clear when I said "step" I meant the step command (included in the latest screenshot), as in re-running it with different loads, not applying different loads and seeing how it responds live. I haven't even really started thinking about that part of it yet
Shame Boy fucked around with this message at 20:53 on Dec 3, 2021 |
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Dec 3, 2021 20:50
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Okay I dug around in some old parts bins and found an LM317 and LM337 so I think I'm just gonna use those, thanks anyway e: Heck I actually have a 7806 and 7906, when the hell did I get these 
Shame Boy fucked around with this message at 21:11 on Dec 3, 2021 |
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Dec 3, 2021 21:08
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Hell yeah, definitely better to let past-Bob-Dobkin sweat the details for you. For the sake of completeness, I think what I missed is that flipping the reference IC like that makes it regulate the voltage between the pass device's base and the voltage divider, not the voltage divider and ground, so moving the divider isn't going to solve the fact that the other terminal is still up a Vbe from the output. My bad on that.
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Dec 3, 2021 22:08
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Stack Machine posted:Hell yeah, definitely better to let past-Bob-Dobkin sweat the details for you. For the sake of completeness, I think what I missed is that flipping the reference IC like that makes it regulate the voltage between the pass device's base and the voltage divider, not the voltage divider and ground, so moving the divider isn't going to solve the fact that the other terminal is still up a Vbe from the output. My bad on that. Yeah I think I was starting to suss this out poking around in LTSpice and noticing where various voltages were sitting, then I found the other regulators and well whatever. On another note, this is for powering one of those Cremat charge-sensitive preamps to try out some solid state detectors I got now that I've built a vacuum chamber for it. I think I might just make a separate thread for "DIY Radiation Stuff" since a lot of it beyond the amplifier circuitry isn't really electronics-related and I think it'd be a fun thread to have anyway. Would it be a thing anyone other than me would be interested in or wanna post their own stuff to?
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Dec 3, 2021 22:20
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I would lurk in that thread
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Dec 4, 2021 03:33
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Any fiber optics people here? I did a test on some 1:2 PLC splitters I bought (just in case they came in handy), and as expected if I inject a signal on one of the split ports I get around 3 dB insertion loss to the common port. If I then leave the common port open, and measure on the other split port, I get around -60 dB or more, that is with all APC terminations. If I put a UPC end on the common port my measurement jumps to around -20 to -25 dB. Putting in a APC-UPC then UPC-APC (into air) cable I get around -50 dB, if it's a dirty UPC-UPC junction I can get slightly more. So looking around I couldn't find anything specifically about this, but seems like this is a pretty viable and easy way to (approximately) measure return loss. I obviously have a 6 dB loss factor from the laser to the power meter (3 dB going to the common port, 3 dB on the return to the power meter). Further the laser might not be super happy about the state of things so might change power slightly if the return loss is poor. Am I missing something or is this a serviceable way of doing return loss measurements on the cheap? I also noted that one of the two splitters I tried seemed to have around 10 dB better performance than the other, so might require splitter-selection to achieve a good measurement range since obviously I'm limited by the splitters isolation performance.
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Dec 4, 2021 10:57
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longview posted:Any fiber optics people here? If you model the splitter as an ideal reactive power splitter, and assume all ports are terminated with perfect match, your measurement would just be S23 or S32 of the network. 1/4 of the power goes to the power detector, 1/2 of the power goes to the common port, and 1/4 of the power gets reflected back to the source. Perfect fiber optic open/short circuits don't exist, but if you were to perfectly open circuit the common port, the ideal reactive power splitter would have perfect transmission from the source to your power meter. If you were to perfectly short the common port, you'd ideally have no transmission from the source to your power meter. All of the signal would be reflected back to the source. If the common port were terminated in any other kind of purely reactive load, the power detected at the power meter would be somewhere between perfect and zero transmission. All of these kinds of terminations have 0 dB return loss, but this model for your setup would predict very different numbers for power detected at the other uncommon port. Maybe the ideal reactive power splitter is a bad model for your device? IDK, I don't have a lot of insight into fiber optic splitter design. I feel though that a passive fiber optic splitter is probably a lot like a microwave reactive power splitter. I don't think that they have something like a Wilkinson power splitter in integrated optics, since there is no such thing as a lumped element resistor for them, but I could be wrong. silence_kit fucked around with this message at 15:45 on Dec 4, 2021 |
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Dec 4, 2021 15:23
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Has anyone used a component that has a footprint that surrounds the others? There doesn't appear to be room for vias between the pads. Is this right, where the vias are in the pads? There doesn't appear to be another way: The footprint is called HCLGA. I made the footprint myself using dimensions from the datasheet. This is for a ST PDM mic. I haven't encountered anything like this before! Related: Should I remove the keep-out on the outside from the ground pad? Since it's surrounded by ground anyway. edit: Pretty sure I have the pins backwards too. Also: KiCad is triggering a missed connection error on the ground pad, which usually means I have something wrong, but I can clearly see it's tied to the ground plane in that pic! Dominoes fucked around with this message at 16:32 on Dec 4, 2021 |
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Dec 4, 2021 16:15
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silence_kit posted:If you model the splitter as an ideal reactive power splitter, and assume all ports are terminated with perfect match, your measurement would just be S23 or S32 of the network. 1/4 of the power goes to the power detector, 1/2 of the power goes to the common port, and 1/4 of the power gets reflected back to the source. I also suspect we can mostly ignore the phase of any returned energy since at these scales even thermal expansion would cause massive phase change - normally we can only measure a scalar return loss figure. (Obviously does not apply to lasers.) So a perfectly terminated fiber end is one that manages to not reflect any light backwards into the fiber - hence the APC connectors which directs reflections into the fiber cladding by angling the fiber end vs. the light direction. UPC ones do reflect when going into air since they've polished the fiber normal to the light direction, the change in refractive index causes the same amount of reflection as the APC connector would but due to the geometry a lot of it goes into the fiber again. Looking at so far the best explanation document I've found for how PLC splitters are made here: https://www.profiber.eu/files/predn...3%ADch_FTTx.pdf Page 4 has an overview of the various waveguide-designs, but I haven't found any detailed explanation of how these designs would behave, nor any detailed picture of what a 1x2 splitter looks like at that scale. Here's some general specs on this type of splitter: https://www.firstfiber.cn/Blog/detailed_introduction_of_plc_splitter.html The return loss is probably measured with an OTDR so they can remove whatever return loss happens at the output connectors and isolate just the splitter itself. The directivity figure is in line with what I'm getting (one was around 50, another around 60 dB) so I think I'm measuring that correctly. I suppose one thing to ask is: when I drive the split port, I get 3 dB insertion loss to the common port, where does the other 3 dB go, it certainly doesn't go to the other split port. One of my colleagues mentioned once that he assumed most splitters were basically 4 port devices, so for a 1x2 split it's really a 2x2 split (which is around the same cost as a 1x2, not an uncommon device), which at least explains where half the power is going when e.g. you're driving one of the split ports, it's going out into that unconnected port next to the common port. If that port is properly terminated (i.e. has an angled grind & polish before going off into air or something) then it will appear to be nearly perfectly "terminated" with a return loss around -65 dB or better. Which could explain where that light goes at least, though I suppose it assumes this splitter is built as a waveguide directional coupler, and not a Y-branch (for a true 3-port device that 3 dB loss has to go somewhere, right?). I don't have one of those here right now but I have done some measurements on a 2x2 splitter a few years ago and I seem to recall it worked like a 4 port device (using S-parameter numbering) with a 50/50 split from 1 to 2/4 and isolation to 3. Likewise driving 3 gives isolation to 1 and transmission to 2/4, and the mirrored case as well. Dominoes posted:Has anyone used a component that has a footprint that surrounds the others? There doesn't appear to be room for vias between the pads. Is this right, where the vias are in the pads? There doesn't appear to be another way: If you remove the ground keepout it will ground better, but might also become even more impossible to solder. It's probably designed for either super tiny vias on thin PCBs, fully capped vias, or microvias with an HDI layout scheme, where this footprint would actually make sense since the top layer is all ground fill anyway. IIRC you can at least get I2S microphones that have slightly less silly footprints, but none of them are super easy to work with. And yeah it's not super uncommon for some footprints to have a bottom-side view instead of a top down one. P.s.: keep in mind that microphones hate cleaning fluids and flux. longview fucked around with this message at 17:44 on Dec 4, 2021 |
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Dec 4, 2021 17:41
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Dominoes posted:Has anyone used a component that has a footprint that surrounds the others? There doesn't appear to be room for vias between the pads. Is this right, where the vias are in the pads? There doesn't appear to be another way: I’ve seen this sort of thing solved on high density BGA parts with no practical way to route out from the inner pads using smaller diameter vias or blind vias. Not something I’d do as a hobbyist though, I’m pretty sure OSH Park straight up does not support blind or buried vias. Try setting your via diameter as small as your fab will let you and see how that goes. I suppose you could also design the footprint so the ground ring has a gap to run small traces out, but I don’t know if or how that would affect this particular part.
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Dec 4, 2021 17:53
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So I've just been messing around a bit more in LTspice with oscillators without feedback circuits just off of mains, and this is certainly a very interesting pattern: What is this kind of longer oscillation called, and is there a passive way to prevent it? 1/(sqrt(5.195 958 136 H * 1.95uF)*2*pi) is 50Hz to 8 decimal places and these are all ideal components e: I guess at some point I just need to do a proper course, or at least read a book, otherwise I'll just constantly get stuck on this kind of thing gonadic io fucked around with this message at 18:15 on Dec 4, 2021 |
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Dec 4, 2021 18:09
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longview posted:Looks to me like that footprint is designed exclusively for reflow soldering for like cellphones or something (PDM digital microphone I assume). csammis posted:I’ve seen this sort of thing solved on high density BGA parts with no practical way to route out from the inner pads using smaller diameter vias or blind vias. Not something I’d do as a hobbyist though, I’m pretty sure OSH Park straight up does not support blind or buried vias. Try setting your via diameter as small as your fab will let you and see how that goes.
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Dec 4, 2021 18:10
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Dominoes posted:Yep, PDM mic of the sort you might put in a cell phone. I'll leave the ground keepout in then; should work fine with it there using the trace I put through the keepout. Also going to look into alternative parts! I might just roll the dice and see if JLC will do the one I posted (With the pin mapping fixed). 0.6/0.4 vias in the pads. The issue with via in pad is you're going to lose a bunch of solder down the via, potentially giving a bad joint. Normally I don't mind a standard via in pad for hand soldering since you're always adjusting the solder amount by eye anyway but it's different for something you can't even inspect. I suppose you could pre-tin the pads then move the excess with braid first to attempt to plug the hole a bit. If you remove the solder mask clearance on the other side that might fill it up a bit from the bottom, reducing how much solder it wants. Solder mask insulation may not be worst idea in the world, depends on how many you're making really. If you're careful not to scratch off the solder mask (and it's of decent quality) then it might be fine actually. IIRC solder mask not sticking was a major issue on older cheap PCBs where they tinned the whole board before solder mask but no one does that anymore. In that case it dissolve as soon as the tin solder coating melted.
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Dec 4, 2021 18:18
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- Yeah, generally the way to do that would be to use smaller vias. None of the cheap board houses support small enough vias to do BGA, realistically, on their lowest cost process. All of them support throwing cash at them to get smaller via sizes though. This is not usually the right approach, unless you really do need a whole bunch of BGA parts. - There's a green line on the left of your footprint. I bet you somehow split the pad in two in the footprint editor or something, and KiCad doesn't know what to do with it, and that's why it's throwing a DRC error - I would probably try to get a sliver of the pad connected to main ground on the bottom as well - Keep it symmetrical so reflow doesn't pull the part off the footprint - Via in pad will work fine if you're hand assembling it. For machine assembly / reflow, it has the potential to wick away solder and cause cold joints, bad connections
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Dec 4, 2021 18:21
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Thank you. Switching to .4 / .3 via size for those, which JLC supports. Not sure what the price impact will be. Re the green line. I did something weird to make the pad, where you draw the pad, then silkscreen, then select it all, right click, and select "Create pad" or something. Maybe confusing the checker, but probably fine for production? Going to add the sliver. For now hand assembly, but I guess I can cross the machine reflow later if this works out? I'll try the pre-tinning etc, especially if there are solder faults. Might be attempting this in 2 weeks or so once the boards arrive if I can figure this out this weekend.
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Dec 4, 2021 18:27
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Latest: 
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Dec 4, 2021 18:32
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I may be able to get the vias off the pads with this via size like I do for the 3v3... edit: Not without violating the rules for keepaway on the ground pad. Dominoes fucked around with this message at 18:36 on Dec 4, 2021 |
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Dec 4, 2021 18:33
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Dominoes posted:Thank you. Switching to .4 / .3 via size for those, which JLC supports. Not sure what the price impact will be. All of this sounds reasonable, fire away
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Dec 4, 2021 18:36
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Thanks for sharing that info. I agree, like what you and your coworker suggest, the splitter is probably a 4 port device with with 4th port 'terminated'. It might be similar to what people in RF call a 'hybrid coupler', and not the 'reactive [in-phase] power splitter' I initially suggested. The transmission from uncommon port to other uncommon port being labeled 'directivity' and not 'isolation' is a hint. I'm honestly not greatly familiar with the theory and design of coupled line circuits, but somewhat famously return loss in RF is often measured using a directional coupler. It seems like you are doing something very similar to that. A hybrid coupler is a directional coupler where the 'main line loss' and the 'coupling factor' are both 3 dB. longview posted:I suppose one thing to ask is: when I drive the split port, I get 3 dB insertion loss to the common port, where does the other 3 dB go, it certainly doesn't go to the other split port. I think the answer is likely what you suggest: it goes into the 'terminated' internal 4th port. In microwave class, one of the results of network theory which is usually presented is that it is impossible for a three port network to be simultaneously lossless, reciprocal, and matched. Your device doesn't meaningfully have signal loss inside the circuit, you say it is well-matched, and that it is made of a normal optical material which obeys reciprocity. So it has to have that 4th port. In the 3 port reactively matched power splitter design I referred to earlier, the way the result is obeyed is that the device is not a matched device. The uncommon ports have 6 dB return loss. When the 3 port reactively matched power splitter is driven at one of the uncommon ports, 1/2 of the power goes to the common port, 1/4 of the power goes to the other uncommon port, and 1/4 of the power gets reflected back to the source. silence_kit fucked around with this message at 23:45 on Dec 4, 2021 |
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Dec 4, 2021 22:19
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silence_kit posted:In microwave class, one of the results of network theory which is usually presented is that it is impossible for a three port network to be simultaneously lossless, reciprocal, and matched. I seriously appreciate these slides 
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Dec 4, 2021 22:44
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gonadic io posted:So I've just been messing around a bit more in LTspice with oscillators without feedback circuits just off of mains, and this is certainly a very interesting pattern: My guess is that low frequency beat there is just an artifact of the simulator, not a real phenomenon. You're connecting an impedance of 0 across a voltage source (a positive and negative reactance of equal value at 50Hz, so when you connect them in series they sum to 0) so the current and voltage are both undefined. If you want to get an idea of what the real-world behavior of this circuit would be, add a 1-ohm resistor in series (or set the series resistance parameter for the inductor or cap) to represent the internal resistances of the components. If you want to see it oscillate, you can replace the sine wave voltage source with a piece-wise linear source that starts at 0V, at T=1s is at 0, and at T=1.001s goes to 1V.
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Dec 5, 2021 06:57
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Stack Machine posted:My guess is that low frequency beat there is just an artifact of the simulator, not a real phenomenon. You're connecting an impedance of 0 across a voltage source (a positive and negative reactance of equal value at 50Hz, so when you connect them in series they sum to 0) so the current and voltage are both undefined. If you want to get an idea of what the real-world behavior of this circuit would be, add a 1-ohm resistor in series (or set the series resistance parameter for the inductor or cap) to represent the internal resistances of the components. If you want to see it oscillate, you can replace the sine wave voltage source with a piece-wise linear source that starts at 0V, at T=1s is at 0, and at T=1.001s goes to 1V. That worked thanks. There's still a little bit of a low frequency oscilation going on but it's at least stable enough to reason about. This is the kind of circuit that I'm very much not keen on recreating and testing in person for obvious reasons!
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Dec 5, 2021 13:36
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gonadic io posted:That worked thanks. There's still a little bit of a low frequency oscilation going on but it's at least stable enough to reason about. This is the kind of circuit that I'm very much not keen on recreating and testing in person for obvious reasons! If you can get a wall wart that outputs AC you can play with that. I have some that output 9VAC that I got cheap at some point. Or if you're really getting into electronics, a signal generator is a tool that you really want to have anyway. I should probably take my own advice on that and start seriously trying to get one myself!
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Dec 5, 2021 15:58
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Forseti posted:If you can get a wall wart that outputs AC you can play with that. I have some that output 9VAC that I got cheap at some point. Or if you're really getting into electronics, a signal generator is a tool that you really want to have anyway. I should probably take my own advice on that and start seriously trying to get one myself! No need for any fancy device, danger cables emit 240VAC here just fine! P swift way to die though to step it up to *squints* 28kV in a non-isolated way.
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Dec 5, 2021 16:03
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Just get the koolertron one from Amazon. It's 100 bucks and has all kinds of cool features.
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Dec 5, 2021 17:03
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Two things: 1) In manufacturing, should a keep-out layer get cut from the board? I got back some boards that had the keep out cut out of the board, though in Altium they show the board as normal and just keep out copper and vias and the like. Did the manufacturer screw it up? First time I've had it happen, normally they just ignore it since it's a "design" thing and not a manufacturing thing (e.g., keeps pours out in design). 2) On a LM2936 PMIC, the data sheet says this about the cap that goes after the output of the reg: "Locate capacitor as close as possible to the regulator output and ground pins." This is feeding an MCU, and it was my understanding to locate the cap next to the MCU input. Do I: Put the cap next to the reg Put the cap next to the MCU Put the cap next to the reg but an additional cap next to the MCU? The trace is about a 2250mil long. PRADA SLUT fucked around with this message at 00:24 on Dec 11, 2021 |
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Dec 11, 2021 00:21
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PRADA SLUT posted:Two things: Your understanding is correct. Keepout and cutout/board outline are very different things. Unless you somehow also modified the board outline when you made your keepout, the fab house messed up quote:2) On a LM2936 PMIC, the data sheet says this about the cap that goes after the output of the reg: More bypass capacitors will not hurt. Put the recommended cap on the output as well as (usually 0.1uF) on the inputs of any ICs.
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Dec 11, 2021 00:53
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Why is the keepout even getting added to the gerbers you send to the fab? The fab doesn't need it, it's just for your design tools to know not to let you route there or to make a hole in the ground plane or whatever. Sounds like you might need to tweak your export settings or something 
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Dec 11, 2021 00:55
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Shame Boy posted:Why is the keepout even getting added to the gerbers you send to the fab? The fab doesn't need it, it's just for your design tools to know not to let you route there or to make a hole in the ground plane or whatever. Sounds like you might need to tweak your export settings or something I suppose I don't need it, but I just output the entire thing and zip it to send off. it's just an extra step I need to remember. KnifeWrench posted:Your understanding is correct. Keepout and cutout/board outline are very different things. Unless you somehow also modified the board outline when you made your keepout, the fab house messed up This was my thought, so it goes: PMIC > 100pF > 100n > IC ?
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Dec 11, 2021 01:36
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PRADA SLUT posted:I suppose I don't need it, but I just output the entire thing and zip it to send off. it's just an extra step I need to remember. The software shouldn't even be exporting keepouts unless it's set up weirdly. Try uploading your zip to https://circuitpeople.com for a no-frills view of your gerber layers. That used to be indispensable for me to really understand what was going on. Most gerber viewers do some processing before the show you layers, and that bothers the hell out of me. PRADA SLUT posted:This was my thought, so it goes: PMIC > 100pF > 100n > IC ? Yeah, that
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Dec 11, 2021 01:53
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