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JawnV6
Jul 4, 2004

So hot ...

Alereon posted:

The 28nm successor to the AMD Ontario and Zacate low-power x86 processors, the Wichita series, has taped out at AMD for production at TSMC. "Taping out" means the chip design has been completed and sent for initial test manufacturing, after which they make any further necessary changes.

That's next to useless. It's not telling you what stepping vs. the planned production stepping. Consider when the first reports of Sandy Bridge tapeout hit, July 2009.

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JawnV6
Jul 4, 2004

So hot ...

PC LOAD LETTER posted:

Resources would probably be better spent on a bigger/faster cache or branch prediction or improving clockspeed.
No. Branch prediction is such a dead topic and is never the answer. In my later classes where we had to cook up architectural features, we were explicitly discouraged from doing anything with branch prediction. When you're above 95-97% on most workloads.. who cares?

Devian666 posted:

For desktop everything is cpu limited.
I'm waiting on the network more often than the CPU. I think the Android emulator's one of the few cpu-bound tasks I still have.

Devian666 posted:

Given they're going to stepping B2 instead of redesigning the chip from scratch it seems like there isn't a major architectural issue.
A full stepping (C0) wouldn't be a "from scratch" redesign. The only difference in full steppings and dashes is what layers of the metal you're touching. A full stepping lets you move transistors around, a dash just lets you reroute wires. And on that note, this semiaccurate article makes the type of stepping unclear:

quote:

Some sources are describing the ‘shipping’ step as B3, others as C0. C0 would seem to fit the performance bump problem model, and B3 a bug fix. With the backdrop of sandbagging though, you can’t say for sure no matter what is printed on the chip.
I'd disagree with their conclusions. A full stepping could be necessary for an architectural bug OR a speedpath, or you could get lucky and a dash could fix both. My guess would be a full stepping implies a bug.

Star War Sex Parrot posted:

Only because I love my SH/SC posters.
Oh.

JawnV6
Jul 4, 2004

So hot ...

PC LOAD LETTER posted:

The way it was explained to me was that if the remaining 3-5% come to dominate 50-90% of your pipeline stalls/inactivity (note: that is a number I'm throwing out there, the exact amount will vary from one design to the next, I have no idea what it is for current chips from Intel or AMD much less older ones) then its worth it to still throw resources at it.
Forget about design-dependency, that's terribly workload dependent and difficult to even collect on a live system. I'd be shocked to find a workload that's having 90% stalls on branch misses that's not a pathological case. Use a data set that'll spill out of the L3 and tell me you're not waiting on memory.

PC LOAD LETTER posted:

IIRC AMD said adding a 3rd pipeline to the original K7 added around 5% more performance in general and adding more would get you even less, so more pipelines was getting some very diminishing returns years ago.
I can't understand what you're saying here. Assuming you're using the word "pipeline" instead of "decoder," it's really difficult to take the effect that stretching that one part of the design did over a decade ago and assume it's relevant to a modern architecture. You're sitting right between the instruction cache and the OoO engine and I can guarantee that those structures have grown much bigger in that time frame.

I know you're trying to say the ISA has some fundamental limit on how many instructions to decode in a cycle. I just don't buy that without better evidence.

JawnV6
Jul 4, 2004

So hot ...

COCKMOUTH.GIF posted:

AMD ARM mainboards

You're basically advocating entry into two separate markets outside AMD's core competencies where there's already vicious competition by established players. I think your analysis is a little one-dimensional. There are more than two companies that design processors.

JawnV6
Jul 4, 2004

So hot ...

Coredump posted:

What kills me is people who are cheering on AMD to succeed and become competitive with Intel again so they turn around and buy more Intel chips at what they hope will be lower prices.

Yeah i hate it when people act like rational consumers instead of blind fanboys.

JawnV6
Jul 4, 2004

So hot ...
Can BD do an L3 chop besides 8M/0M? Or does the cache setup still have that hole if L3 exists and has less space than the combined L2's?

JawnV6
Jul 4, 2004

So hot ...

Devian666 posted:

I'm not sure anyone has that information other than AMD's engineers and the motherboard manufacturers.

Yeah I guess it's super-hard to scan a product line and see if they're selling anything besides 0M L3 and 8M L3 parts? These threads are normally full of system-builder types who could answer that at a glance.

JawnV6
Jul 4, 2004

So hot ...

Devian666 posted:

So difficult that you didn't do this yourself. You could research this and response to the thread.

You may find that any information may be subject to change given that the previous version of the chip didn't perform as expected.

Yes. System builders who are constantly shopping for parts and aware of product lines have easier access to this information than I do. I'm seriously asking if anyone's seen a 2, 4, or 6 in the L3 column or if it's all 0 or 8. This shouldn't involve research, it's a yes/no question that I'm sure someone following this thread can answer offhand. I'm not sure why you're being so prickly about this, you didn't even understand the question well enough the first time I asked it to produce a coherent response. Motherboard manufacturers wouldn't have a clue what sizes the L3 can come in and availability of chops is public information.

JawnV6
Jul 4, 2004

So hot ...

feedmegin posted:

ARM might want a word with you on that one...

Yea, providing a soft IP core. That's totally the entire stack.

JawnV6
Jul 4, 2004

So hot ...

HalloKitty posted:

But they say the correct thing right there, that the company was just correcting a mistake in handed out specs.

It's not news item worthy on a site like Engadget..

The guy who wrote that seriously doesn't understand it was a correction. He quotes AMD's PR on it and that correctly identifies the situation, but his usage of words like "the reduction," "depriving," and "loss" reveal a lovely understanding.

JawnV6
Jul 4, 2004

So hot ...

Shaocaholica posted:

I would love to see next gen consoles go 64bit just so developers can port over to x86-64 and ditch 32bit builds altogether.

What? I think the gap between PPC and x86 is a tad bigger than 32/64. And if you're not addressing more than 4GB of dram/mmio why do you want 64 bit?

JawnV6
Jul 4, 2004

So hot ...

necrobobsledder posted:

I totally remember that post on Hardforums. The innards of the chip were ripped out and you could see the different metal layers of the chip. It looked like an x-ray version of some of the VLSI diagrams put out in press kits but in a vertical cross section form.

Anyone have this picture?

JawnV6
Jul 4, 2004

So hot ...
The only issue would be would Nvidia make hypertransport enabled graphics cards.

JawnV6
Jul 4, 2004

So hot ...

Colonel Sanders posted:

*edit* the more I think about it, is the idea of a hybrid CPU with multiple cores, 1 (or more) x86 and 1 ARM core even possible?
Silicon doesn't really give a poo poo. Want to slap an ARM, x86, and RISC core on the same die? Go for it. They'll all come up, run, etc. No problem.

Want the software running on that platform to be aware of the other cores and be able to use them? :can:

Getting two of the same cores to run coherently is difficult, shuffling data between different types of cores is a nightmare. It's possible, but I don't envy anyone working on that stack.

Colonel Sanders posted:

The catch is I really think there could be a viable market for a full x86 and ARM CPU
I disagree with this assertion. I'm struggling to find a use case for "I have a giant x86 core and want a dinky ARM around to do some compute on". By the time you ship the problem off and convert your endians the x86 already solved the problem on a cycle-accurate ARM simulator and went to sleep. It makes sense for GPU's because the problems are amenable to 1000 copies of a dumb adder being able to execute in parallel. An A5 doesn't have that kind of advantage.

JawnV6
Jul 4, 2004

So hot ...

roadhead posted:

Not when the bottleneck is your HDD

What century are you posting from??

JawnV6
Jul 4, 2004

So hot ...
It's all just race to idle.

JawnV6
Jul 4, 2004

So hot ...
I agree. x86 isn't imposing any limitations on the user experience.

JawnV6
Jul 4, 2004

So hot ...

keyvin posted:

I was reminded of an interesting article about bulldozer, and I don't know if its been posted but:

http://www.xbitlabs.com/news/cpu/display/20111013232215_Ex_AMD_Engineer_Explains_Bulldozer_Fiasco.html

That seems like a rather myopic take. You're asking the guy who was in charge of X why a massive engineering effort involving hundreds of people across dozens of unrelated disciplines failed and surprise surprise it's some decision about X!!

JawnV6
Jul 4, 2004

So hot ...

Foil posted:

How did you end up with no clue about what you are talking about in the first place?

A living, breathing AMD fanboy? Didn't y'all go extinct around '09?

JawnV6
Jul 4, 2004

So hot ...

wheez the roux posted:

If we were talking really extreme viewpoints, I'd say we should commit Manhattan Project level resources to <10nm and quantum computing.
Whoa. Wow. Manhattan Project level resources? Holy poo poo that's got to be huge.

Wikipedia posted:

employ more than 130,000 people cost nearly US$2 billion (roughly equivalent to $25.8 billion as of 2012)
Oh wait, that's less than the quarterly revenue of the top 5 companies in the industry. And less employees than the #2 alone.

Aside from your bizarre idea to try and nationalize this, as thebigcow noted, "which nation?" is the begged question there, if you're concerned about Manhattan Project level resources being committed they already are.

JawnV6
Jul 4, 2004

So hot ...

Alereon posted:

I'm not saying that nationalization is the solution, but <10nm fabrication certainly isn't a solvable problem for independent for-profit corporations.

If it wasn't for the plural this would be ludicrous.

JawnV6
Jul 4, 2004

So hot ...

LeftistMuslimObama posted:

That number isn't adjusted for inflation.
Feel free to take another whack at reading this I guess:

Wikipedia posted:

employ more than 130,000 people cost nearly US$2 billion (roughly equivalent to $25.8 billion as of 2012[1])

JawnV6
Jul 4, 2004

So hot ...

Alereon posted:

This isn't true at all. Intel's 2012 R&D budget was $10.1 Billion across ALL products and areas, and Intel is the only company I'm aware that is fabbing logic at under 28nm, or has <20nm fabs for something other than memory as more than a glimmer in their eye.
Coming back to this, in one year a single company spent 40% of the Manhattan Project's entire 4-year budget on R&D. Going back to wikipedia, "Over 90% of the cost was for building factories and producing the fissionable materials, with less than 10% for development and production of the weapon." So yes, I still think it's a comparison built on fundamentally misunderstanding the two quantities involved.

ohgodwhat posted:

So your complaint is that saying it would need to be on the scale of the Manhattan project is understating the issue. How does that invalidate his point?
He was positing it as an "extreme" viewpoint when the industry is outpacing that level of investment and personnel already.

ohgodwhat posted:

EDIT: And trying to use Samsung's employee count in this comparison is specious. Only 20% of their revenue comes from semiconductors. You might as well use Walmart's employee count.
I wasn't too concerned with presenting an airtight case to someone who clubbed <10nm nodes and "quantum computing" together in the first place. I don't think that all 130k Manhattan people were all physics postdocs, given that crew only got 10% of the budget as noted above. And aside from the industry itself you've got academia doing most of the <10nm structural research right now. I think the personnel counts are a wash, mostly because the MP was just so small.

JawnV6
Jul 4, 2004

So hot ...

Alereon posted:

You're right, this is actually a vastly harder problem than the Manhattan Project
Sure.

Alereon posted:

Intel spent $8 Billion just on four fabs for the 22nm transition, and three of those were upgrades of existing fabs.
Yes, $8b which is not included in

Alereon posted:

that $10B R&D budget
The dispensation of which I am familiar with.

It's a nasty comparison when you try to drill to any level of real detail. The MP budget includes things R&D and capital costs so trying to compare it to slices of corporate budgets, as you were, it's easy to point out the inaccuracies. My original post was deconstructing wheez's ridiculous fantasy. I don't think anyone's actually backing wheez's point anymore, we're just discussing how wrong my teardown was?

I think our disagreement comes down to this:

Alereon posted:

The point I was making is that the costs are going to become so astronomical that no single company will be able to profitably fund a process shrink
You're asserting that this point will happen before <10nm. I disagree.

JawnV6
Jul 4, 2004

So hot ...

icantfindaname posted:

If the cpu market really is a natural monopoly then at the very least it should be more tightly controlled to prevent Intel from loving everyone over.

Are we pretending that ARM and the incredibly diverse ecosystem supporting it is nonexistent?

JawnV6
Jul 4, 2004

So hot ...

icantfindaname posted:

Unless and until we're going to ditch x86 and move everything to ARM, Intel is in position to run the desktop, server and laptop markets at monopoly prices.
Ok, yeah, we're just closing our eyes and pretending ARM doesn't exist and wouldn't happily leap at the chance to take all those markets. Besides that... cell phones? Tablets? Never heard of them. Are they an important market?

It's like an AMD fanboy with 2007's script.

icantfindaname posted:

Now I don't actually think nationalization is a good idea, but decrying it as "bu bu but COMMUNISM!!!!" as you seem to be doing is not helpful.
Er... not really sure where I said that. Can you point it out?

My main argument against nationalization is the same question of "which nation?" that you raised given that the semiconductor industry isn't a purely American enterprise.

JawnV6
Jul 4, 2004

So hot ...

icantfindaname posted:

Considering Intel is an American corporation, then America? I mean, I don't think it's a good idea either, but that's not really a substantial issue. Nationalization also doesn't have to mean taking over an existing company either, they could just set up a government processor research agency or something.
Right, there's just that sticky lil problem of what to do with the design centers, fabs, and non-American employees in Bangalore, Penang, Haifa.... oh, sorry, not a "substantial issue"

And why do we need an agency? Do you think the current DARPA funding of say, GAA research is inadequate? Can you even expand that acronym?

icantfindaname posted:

And again, I don't think nationalizing Intel is a good idea. I think public funding for cpu research is an interesting idea, but I'm not knowledgeable enough to say for sure. I think I misunderstood your position against nationalizing Intel in the first place.
I think you're ignorant of the public funding already going into "cpu research." Weren't we talking about transistors and fab tech anyway?

JawnV6
Jul 4, 2004

So hot ...

Agreed posted:

Pretty sure he works there and so while he can't talk to us about anything specific for obvious contractual reasons, he can still, using his knowledge that he can't share with anyone, pretty well poo poo on anyone else who lacks that members-only information for not having a clue about the specifics of what we're trying to discuss, I think, is the idea there.
Alereon could absolutely school me on process tech. And given that I'm talking about DARPA funding, my magic secret information was mostly culled from here.

It's grating to see people talking about a component of the industry that's been around for decades as an "interesting idea." But in the future, I'll try to show more respect and deference to ignorance.

JawnV6
Jul 4, 2004

So hot ...

roadhead posted:

This is heavily customized and will have volume in the millions most likely over the next 8-10 years, so I'm assuming all stops were pulled.

It's not a matter of volume ("millions over 8-10 years" is pitiful) or pulling stops. Cache coherence between heterogeneous compute cores is a Hard Problem. It's entirely possible the complexity of making the agents agree on protocol was far greater than either team could manage.

Not to mention pointless if you can just solve it in software.

JawnV6
Jul 4, 2004

So hot ...

roadhead posted:

It's hard sure, but when you have a stable hardware platform and supporting Compiler/SDK/Best Practices a lot of the variables and unknowns that make it "Hard" go away and it becomes a lot more solvable.
They also make it pointless since you can just avoid true sharing cases and handle the complexity in sw instead of hw. I don't see you making an argument against that, just asserting that it's not impossible to do in hw.

quote:

I'm betting we get cache coherence on BOTH the PS4 and the Next xbox (when using the AMD supplied tool-chain of course) and that is probably the thing that sold AMD APU to Sony and Microsoft for this gen.
I get the distinct impression you've either got a lot more information or a lot less than I do.

JawnV6
Jul 4, 2004

So hot ...

Agreed posted:

overall reduction in labor force nearing the 100,000 mark,

Having a hard time believing AMD has somehow churned through their current headcount plus Global Foundries 5 times over.

JawnV6
Jul 4, 2004

So hot ...

Agreed posted:

Still, bunch of people might not be able to feed their kids all of a sudden because A PROCESSOR SUCKED lol lookit these AMD nerds, ha ha very funny, right?

Most of the ex-AMD folks I know are doing quite well. The ARM ecosystem is hot and anyone worth their salt can easily make the jump. If there's some reason they won't work for Intel, that is.

JawnV6
Jul 4, 2004

So hot ...
Timna, if you will.

JawnV6
Jul 4, 2004

So hot ...
Anyone know how ddr4 solved row hammer?

JawnV6
Jul 4, 2004

So hot ...
I still have a near-allergic reaction to accessing patents, but reading between the lines on claim 26 makes it sound like there's an extra command that makes the DIMM go figure out which rows are victims? But the abstract still puts it on the MC to figure it out? A big part of the problem iirc is that the DIMM will swap things around and it isn't clear to the MC which rows are victims to any potential hammer.

JawnV6
Jul 4, 2004

So hot ...
The EU citizens were hurt. The money goes to the EU. Why would a dollar go to AMD?? How do you decide if it goes to AMD, ARM, Transmeta, VIA.... no, no, far simpler to just give it all to the EU.

Pimpmust posted:

It's a drop in the bucket for Intels 50 billion business, but would be quite the significant boost for AMDs 5 billion dollar business.
Oh, like they did back in 2009?

JawnV6
Jul 4, 2004

So hot ...

Riso posted:

This IS the 2009 thing. They merely confirmed the ruling. Intel already paid, no changes.

Not sure if you're just ignoring the context of the conversation or being intentionally confusing, but the payment to AMD I linked to is distinct from the EU ruling.

JawnV6
Jul 4, 2004

So hot ...

1gnoirents posted:

Ooof. That is bleak. They should sell out the CPU side and put their eggs into IBM.

You're beyond bleak if the savior is IBM. I used to be concerned that their teambuilding software (put in project parameters, it scans db of employees/contractors and spits out project team options) would be the core of our dystopian future. But they were bitten by the financialization bug and don't look likely to pull out.

Further reading: http://www.forbes.com/sites/stevedenning/2014/05/30/why-ibm-is-in-decline/
http://www.forbes.com/sites/stevedenning/2014/06/03/why-financialization-has-run-amok/

JawnV6
Jul 4, 2004

So hot ...
Seems like the same problem as raytracing hits, if you can do it effectively you've got the hardware to do more triangles better. If you're able to get a 5.4M transistor chip (which is really, really close to the 4.4M logic cells that Xilinx is offering anyway) that takes a few dozen PhD's to effectively "program," it'll make more sense to buy commodity hardware that's accessible by mere mortals with masters'.

Regardless, going back to the original post I quoted, if AMD "sells out" their CPU side... what's left, exactly?

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JawnV6
Jul 4, 2004

So hot ...

Paul MaudDib posted:

In comparison AMD has a product on the market right now that will let you dispatch CPU and GPU cores to the same memory space without having to copy data around. Honestly that's where I see the long-term performance growth being as we go forward - CPU processing power will continue to double every 18 months but you can get a 8-100x performance bump right now in a lot of applications with heterogenous computing. The fact that you don't need to copy data around makes AMD's product really advantageous in desktop or server-type applications where latency matters.

General question, but how's it do with true/false sharing scenarios split over CPU/GPU? Disallowed, allowed-but-not-guaranteed-coherent, allowed-but-slow? Cursory googling didn't bring anything up, even after assuring the search engine I didn't mean "and."

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