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Rastor
Jun 2, 2001



https://www.fool.com/investing/2017...e-revealed.aspx

quote:

In the same conversation, "chrisdar" also said (per a translation of his comments from Chinese to English) that Intel's upcoming 10nm manufacturing technology is "really miserable"

...

Intel appears to have, once again, tried to lead investors astray as to the health of its 10nm manufacturing technology and the timing of the launches of products based on that technology and its derivatives (e.g., 10nm+ and 10nm++). Considering that Intel has routinely claimed that it has a multiyear leadership in chip manufacturing technology -- something that, frankly, rings hollow in light of the company's product launches over the last several years -- this isn't a good look for the company.

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Methylethylaldehyde
Oct 23, 2004

BAKA BAKA


To be fair, Semiaccurate seems to have a huge hateboner for Intel, no idea what they did to piss in his cheerios back in the day, but a lot of the articles have a pretty obvious bias towards them.

Paul MaudDib
May 2, 2006

"Tell me of your home world, Usul"


Methylethylaldehyde posted:

To be fair, Semiaccurate seems to have a huge hateboner for Intel, no idea what they did to piss in his cheerios back in the day, but a lot of the articles have a pretty obvious bias towards them.

Also for NVIDIA. Like, just as with Intel he revels in proclaiming their imminent demise in every single article, despite that being obviously delusional.

He's yet another ATI/AMD fanboy, just one that happens to have industry contacts.

WhyteRyce
Dec 30, 2001



10nm may be a failure but you should never listen to anything Charlie writes about Intel. He wrote articles about how Optane was completely broken for various specific reasons, claims not backed up by a single person who actually tested it at the time. poo poo, he apparently has no understanding what meta data is and equates it to SSD over provisioning

Cygni
Nov 12, 2005

raring to post



*three years after Intel wanted to launch their process*

we have breaking news that the process might be bad

Could be a good opportunity for Glofo, but im starting to think that whatever Intel ran into with 10nm wont just impact them exclusively.

Paul MaudDib
May 2, 2006

"Tell me of your home world, Usul"


Cygni posted:

Could be a good opportunity for Glofo, but im starting to think that whatever Intel ran into with 10nm wont just impact them exclusively.

Yeah, I'm not really seeing GloFo just magically sidestepping all the issues that Intel ran into, unless there is something radically easier about their process. And presumably if there is, it'll be inferior. Intel wouldn't be taking the hard road for no real reason.

But, GloFo claims 7nm DUV volume production in 2018, and EUV in 2019, so they seem confident about it, at least.

Paul MaudDib fucked around with this message at Dec 15, 2017 around 00:20

SPOOKCORE MEGGIDO
Aug 22, 2004

blub

You know it's going to affect Gloflo /more/.

bobfather
Sep 20, 2001

I will analyze your nervous system for beer money

Intel scraps 10nm process because itís no good at mining crypto.

EmpyreanFlux
Mar 1, 2013

The AUDACITY! The IMPUDENCE! The unabated NERVE!


I thought GloFos 7nm is basically IBMs? Like if there could be a reason why it's not poo poo or hitting the same speed bumps, that would be it. Also I thought the reason Intel's 10nm is bad is because it's heavily optimized for mobile and is this poo poo for desktop because clock/voltage scaling is rear end?

Cygni
Nov 12, 2005

raring to post



Glofo, Samsung, and IBM have a 'reasearch alliance', but Glofo's 7nm DUV and EUV processes are their own. IBM and Glofo are working together on the 5nm process though, but my understanding is that a lot of that is theoretical until they are actually rolling profitable chips out of an EUV process, which hasnt happened for anybody yet.

For intel's 10nm, i don't think its really public what happened yet (maybe it was in that pay walled article idk). Some people are saying they had a completely failed node that would never be profitable, and went back to the drawing board and restarted. Intel has been showing off working 10nm chips and wafers for over a year, so who knows. They definitely shitcanned it for high performance chips, going with 14nm+++++++++++++++++ instead until 10nm+ comes around.

Intel seems to think that whatever wall they hit is going to be hit by everyone else too, saying they still had a 3 year process lead as of summer this year.

EmpyreanFlux
Mar 1, 2013

The AUDACITY! The IMPUDENCE! The unabated NERVE!


https://videocardz.com/74464/amd-pr...ega-11-graphics

VCZ is pretty decent to good as sources go so it looks like incoming 35W laptops, 65W NUCs (Not desktop?), and apparently AMD will also be utilizing that GPU from the Intel/Radeon hybrid. Seems to indicate AMD has access to EMIB, which might be huge in second gen Vega and future HBM products which might reduce cost and complexity.

Also no one makes a 1792SP GPU to not push it to the dGPU market, so Polaris is getting replaced IMHO.

Anime Schoolgirl
Nov 28, 2002

~perfect~
battlebrother





1792 cores along with the CPU in the same die

the 1331 tiny rear end pins make sense now

NewFatMike
Jun 11, 2015



Anime Schoolgirl posted:

1792 cores along with the CPU in the same die

the 1331 tiny rear end pins make sense now

Please AMD get DSBR working so we can have an on-package RX 480 equivalent with that 28CU part.

Also, please Dell make an XPS 15 with a 35W Raven Ridge APU. tia

Getting the small form factor sweats over here.

SPOOKCORE MEGGIDO
Aug 22, 2004

blub

FaustianQ posted:

https://videocardz.com/74464/amd-pr...ega-11-graphics

VCZ is pretty decent to good as sources go so it looks like incoming 35W laptops, 65W NUCs (Not desktop?), and apparently AMD will also be utilizing that GPU from the Intel/Radeon hybrid. Seems to indicate AMD has access to EMIB, which might be huge in second gen Vega and future HBM products which might reduce cost and complexity.

Also no one makes a 1792SP GPU to not push it to the dGPU market, so Polaris is getting replaced IMHO.

Couldn't they just produce CPU / GPU on one die though?

The graphics benchmarks on it are going to be just sad vs the Intel w/ HBM performance.

SPOOKCORE MEGGIDO fucked around with this message at Dec 15, 2017 around 21:35

Cygni
Nov 12, 2005

raring to post



NewFatMike posted:

Please AMD get DSBR working

ive got bad news

SwissArmyDruid
Feb 14, 2014



Yeah, DSBR is already enabled. I this it's the "Next-Generation Geometry" path that you're looking for.

EmpyreanFlux
Mar 1, 2013

The AUDACITY! The IMPUDENCE! The unabated NERVE!


There isn't going to be a bottleneck for the GPU, it's using 2GB memory, likely HBM2, as I don't see it being GDDR5/6. Also I know SiSoft misreports for unreleased SKUs but it's saying the GPU is running at 2.4Ghz if I am reading that right.

How does Vega beat a 1080ti? By clocking it to the loving MOOOOOOOOOON.

Potato Salad
Oct 23, 2014




Tortured By Flan

Haven't checked in in a long rear end time, thread. I'm curious how laptop APUs on Zen2 / Zen+ /2en it's looking? Is anyone putting AMD APUs that compete with, say, budget but high value desktop cards 1050Ti in a laptop?

EmpyreanFlux
Mar 1, 2013

The AUDACITY! The IMPUDENCE! The unabated NERVE!


No one has any idea how Ravens successor is going to look, but my guess is that since Raven is already butting up against a memory limitation Ravens successor might move to 12CUs but otherwise the focus would be smaller, more power efficient rather than more powerful.

If AMD has legit access to EMIB in full then all bets are off then because they could plop down HBM or HBM2 on the die with little issue and even 2GB would be enough to power 1280-2048 stream processors.

SPOOKCORE MEGGIDO
Aug 22, 2004

blub

FaustianQ posted:

There isn't going to be a bottleneck for the GPU, it's using 2GB memory, likely HBM2, as I don't see it being GDDR5/6. Also I know SiSoft misreports for unreleased SKUs but it's saying the GPU is running at 2.4Ghz if I am reading that right.

How does Vega beat a 1080ti? By clocking it to the loving MOOOOOOOOOON.

Oh interesting, I thought the APU's weren't using HBM. That's neat.

EmpyreanFlux
Mar 1, 2013

The AUDACITY! The IMPUDENCE! The unabated NERVE!


GRINDCORE MEGGIDO posted:

Oh interesting, I thought the APU's weren't using HBM. That's neat.

Not sure this is a true APU but may be an MCM. Like I am almost positive this is the same GPU Intel is using in Kabylake-G, except this is the AMD version.

NewFatMike
Jun 11, 2015



Cygni posted:

ive got bad news

SwissArmyDruid posted:

Yeah, DSBR is already enabled. I this it's the "Next-Generation Geometry" path that you're looking for.

Oh noooo what the hell AMD.

What is Next Generation Geometry? Google has brought me nothing.

Anime Schoolgirl
Nov 28, 2002

~perfect~
battlebrother





the second attempt at doing maxwell-era CUDA primitive discard

worth noting that nvidia backported primitive discard to kepler and fermi for a significant performance boost shortly after the first maxwell card hit, that AMD can't somehow do this for GCN is probably not a good thing for the graphics uarch i think?

Arzachel
May 12, 2012


SwissArmyDruid posted:

Yeah, DSBR is already enabled. I this it's the "Next-Generation Geometry" path that you're looking for.

Primitive shaders are separate from the tile-based rendering implementation AMD uses, as far as I know. There's no reason to think it's not working anyways, Vega has way more shading power than Fiji with almost the same effective bandwidth.

NewFatMike
Jun 11, 2015



Anime Schoolgirl posted:

the second attempt at doing maxwell-era CUDA primitive discard

worth noting that nvidia backported primitive discard to kepler and fermi for a significant performance boost shortly after the first maxwell card hit, that AMD can't somehow do this for GCN is probably not a good thing for the graphics uarch i think?

Oh yeesh, you're probably right on that front.

R5 2700U coming from Acer this January, though for $950:

https://techreport.com/news/32973/a...owered-swift-3s

That'll be exciting to wait for the reviews of. Hopefully it won't get lost in the CES announcements.

Paul MaudDib
May 2, 2006

"Tell me of your home world, Usul"


Does NGG Fast Path actually work on Mobile Vega? AMD should have known about the issues with Vega 10 by that point, if it's not even working on their second-gen Vega chips then

3peat
May 6, 2010



This is a really interesting comparison between Intel 10nm and glofo 7nm https://www.semiwiki.com/forum/cont...ading-edge.html

SwissArmyDruid
Feb 14, 2014



Strange, I could have sworn that GloFo was going to GAAFET at 7nm.

PC LOAD LETTER
May 23, 2005
WTF?!

Slippery Tilde

3peat posted:

This is a really interesting comparison between Intel 10nm and glofo 7nm https://www.semiwiki.com/forum/cont...ading-edge.html
That is drat interesting.

If its accurate it sounds like GF's "7nm" process will come out slightly ahead of time vs Intel's "10nm" and they'll essentially trade blows overall with either one having small-ish advantages in limited circumstances instead of the more typical situation of Intel having a head-and-shoulders-above-the-rest process lead when it comes to making high performance CPU's.

EmpyreanFlux
Mar 1, 2013

The AUDACITY! The IMPUDENCE! The unabated NERVE!


Quoting it for those who can't/won't access the link.

Intel 10nm

quote:

SRAM Cell size - High density SRAM cell size of 0.0312um2 and high-performance SRAM cell size is 0.0441um2. 0.56 volt VCC min for low power SRAM.
Logic Cell Size - Minimum Metal Pitch (MMP) is 36nm with a 7.56 track cell for a cell height of 272nm. CPP is 54nm resulting in a cell size of 14,697nm2 (more on this later).
Density - the process offers a 2.7x density increase over 14nm providing what Intel refers to as hyper scaling versus classic 2x density scaling.
Ring oscillator - ring oscillators are 20% faster at the same leakage versus 14nm.
TDDB - improved versus 14nm.
EUV - Intel did not discuss EUV during this talk but did present a paper on EUV at the conference. Intel has 4 EUV tools that they are using for development and they have said they have an optical solution for their 7nm process but will use EUV if it is ready.

GloFo 7nm

quote:

SRAM Cell size - High-density SRAM is 0.0269um2 and high-performance SRAM is 0.0353 um2. Write operations down to 0.5 volts for low power SRAM.
Logic Cell Size - MMP is 40nm with a 6 track cell for a cell height of 240nm. CPP is 56nm resulting in a cell size of 13,440nm2. Larger 9-track cells are also offered for a 10% performance improvement.
Density - the process offers a 2.8x density increase over 14nm and 0.36x scaling for common SOC blocks. GF spent a lot of time optimizing design rules to achieve this.
Cost - Mobile 2 fin 6 track cell provides a >30% costs reduction versus 14nm and depending on the SRAM mix >45% cost reduction.
MIM capacitor - the MIM capacitor offering is 2x the density of the 14nm MIM capacitor.
ASIC - offering available as FX7.
EUV - when EUV is ready a version of this process will be offered with EUV for contacts and vias. By limiting EUV to contacts and vias no shrink is provided but no redesign is required, and 15 masks collapses to 5 masks with a 1.5 day/mask saving in cycle time. One thing I find confusing about this statement is this implies 5 triple patterned optical mask layers becomes 5 single patterned EUV mask layers and yet during the talk 4 color contacts were mentioned. I suppose this could be something like 2 - quadruple patterned contact layers, 1 triple patterned via layer and 2 double patterned via layers. I asked GF to clarify this and they declined to provide that level of detail. A follow-on plus process is planned that will add EUV usage at metal layers providing a shrink but requiring a redesign. GF has been using the EUV tool at CNSE for development, in their Malta Fab 8, GF has 1 EUV tool being installed, 1 being delivered later in December and 2 due in 2018.

Not going to cite the whole thing but it goes on to describe how Intel 10nm and GloFo 7nm DUV (not the eventual shrink with EUV) are basically on par as far as processes go, with GloFo favoring lower power, low voltage situations compared to Intels greater focus on high performance with 10nm.

I guess the biggest news is that Intels foundry lead is gone, utterly evaporated. Is it possible Intel will eventually jettison their own foundries if they can't maintain the lead? I know the amount of control they have on the design process is pretty important but it's starting to look like a massive expense for 10% improved performance.

Paul MaudDib
May 2, 2006

"Tell me of your home world, Usul"


It's amazing that Intel has managed to squander their process lead like that (assuming there is not some critical flaw in GF 7nm that fucks up yields or whatever). Someone's head should roll for this one, either whoever runs TMG or just BK himself for letting it happen.

ufarn
May 30, 2009


Is there an microarchitectural reason why Intel beats AMD so hard in single-thread performance, or is it more due to incremental improvements over time?

Anime Schoolgirl
Nov 28, 2002

~perfect~
battlebrother





ufarn posted:

Is there an microarchitectural reason why Intel beats AMD so hard in single-thread performance, or is it more due to incremental improvements over time?
before Zeppelin, AMD backed the wrong horse of SMT vs. CMT, among other pitfalls like realizing too late that bulldozer adapts incredibly well to low power applications and has a very sharp efficiency decline after those low power targets, before adopting a top-heavy version of intel's uop philosophy and making it up to 90% of the way there in IPC

Paul MaudDib
May 2, 2006

"Tell me of your home world, Usul"


ufarn posted:

Is there an microarchitectural reason why Intel beats AMD so hard in single-thread performance, or is it more due to incremental improvements over time?

Zen is basically Broadwell-level IPC, which is only a few percent behind Skylake/Kaby Lake/Coffee Lake. Intel's lead is pretty much down to clocks and that largely comes down to GF 14nm being a low-power-optimized process that sucks rear end above 4 GHz.

Intel is in a dangerous little cul-de-sac right now, they have squeezed all the gains from the basic Core uarch and have nowhere to really go from there in terms of IPC, and they can't really afford to lose any of their clocks at all either for uarch or process reasons either. Having even a modest Ivy Bridge-style loss of performance would actually be disastrous for them at the moment.

If GF 7nm is outperforming Intel 10nm then get ready to party like it's 2004 because AMD could easily take the actual performance crown, not just the lovely "better margins" or "better price-to-performance" consolation prizes. The clock is ticking, Intel really only has about a year to get their process poo poo straightened out and release a significant uarch revision, or Zen 2 on 7nm brings the house down on top of them probably in early 2019.

Even Zen+ is going to be uncomfortably close since it's on a high-power node and will probably have a few bottlenecks opened up a little bit to boot, not to mention it will have an IMC that doesn't poo poo itself. And that's literally only a few months away.

What I'm saying here is fire Brian Krzanich, he blew it bigtime.

Paul MaudDib fucked around with this message at Dec 20, 2017 around 19:18

Seamonster
Apr 30, 2007

IMMER SIEGREICH


If GF 7nm really is coming in early 2019 then 2018 is going to be a zugzwang year for purchasing Ryzen anything. I do want all the good things that (could) come from the 12nm refresh coming for sure in 2018 but don't really want all those advantages surpassed so soon if 7nm Zen2 is that outrageously ahead. At least AM4 socket stays relevant.

Arzachel
May 12, 2012


Paul MaudDib posted:

Zen is basically Broadwell-level IPC, which is only a few percent behind Skylake/Kaby Lake/Coffee Lake. Intel's lead is pretty much down to clocks and that largely comes down to GF 14nm being a low-power-optimized process that sucks rear end above 4 GHz.

I think it's also down to Summit Ridge being AMD's first shot at both the architecture and the process, the stepping used for Threadripper dies moves the scaling wall 200-300 mhz up.

Paul MaudDib
May 2, 2006

"Tell me of your home world, Usul"


Arzachel posted:

I think it's also down to Summit Ridge being AMD's first shot at both the architecture and the process, the stepping used for Threadripper dies moves the scaling wall 200-300 mhz up.

Threadripper is the same stepping as Ryzen. Epyc is on the newer stepping.

Arzachel
May 12, 2012


Paul MaudDib posted:

Threadripper is the same stepping as Ryzen. Epyc is on the newer stepping.

Huh, you're right. No idea why TR overclocks a tad better then, besides binning.

Paul MaudDib
May 2, 2006

"Tell me of your home world, Usul"


Arzachel posted:

Huh, you're right. No idea why TR overclocks a tad better then, besides binning.

It's binning. Threadripper is the best 5% of all Ryzen dies.

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Combat Pretzel
Jun 23, 2004

No, seriously... what kurds?!

Paul MaudDib posted:

If GF 7nm is outperforming Intel 10nm then get ready to party like it's 2004 because AMD could easily take the actual performance crown, not just the lovely "better margins" or "better price-to-performance" consolation prizes. The clock is ticking, Intel really only has about a year to get their process poo poo straightened out and release a significant uarch revision, or Zen 2 on 7nm brings the house down on top of them probably in early 2019.
Ryzen's achilles heel is the way the IF currently works, IMO. It really needs to go on its own clock domain. And I'm not saying that because I'm crossing my fingers that Zen 2 Threadripper will poo poo onto Intel's breakfast.

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