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I really want to know what they did to accomplish that.
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May 30, 2017 18:51
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New Zealand can eat me posted:Apparently PCI-E 4.0's 1.0 spec just got finalized, so the future isn't that far off (I'm not sure if this is one of the limitations but I am assuming doubling the available bandwidth is one of the prerequisites) GPUs can support the newer cable standards without needing any internal IO upgrade (this is why the ports are directly on the card: so all that data doesn't have to go over any internal bus.) The biggest things PCIe 4 will give us are doubling the bandwidth between the CPU and chipset (which should make it easier to support fancy USB, and is probably a prerequisite for supporting USB 3.2 / 20 Gbps.) And it'll let NVMe drives immediately slam into a 7 GB/s bandwidth bottleneck instead of their current 3.5!  I'm excited for PCIe 4 for a lot of reasons, but it probably won't improve your frametimes much.
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Oct 30, 2017 00:35
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Do these new 10GbE devices also support that new 2.5/5 Gbps standard? For most home users, that's probably the big selling point. Those standards are pretty much just "10GbE downclocked so the signal will transmit fine on cat 5e cable"
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Mar 3, 2018 17:36
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BangersInMyKnickers posted:You're hard-pressed to find enterprise NVMe SSDs that can saturate 4x PCIe 3 lanes Huh? The 3.5 GB/s sequential numbers from even ordinary consumer NVMe drives are doing exactly that.
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Jan 8, 2019 00:07
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Broose posted:I thought pcie 5 was just about done as well? Why even bother with 4? Does 5 even suffer from the problems that 4 has with signal retention? The signal quality thing is physics (or: materials/cost), so PCIe 5 will suffers those problems even worse. I have no idea why people talk about "skipping 4." PCIe 5 may never even appear in consumer hardware. e: Most of the motivation for getting PCIe 5 out fast is to support faster networking hardware in servers. Right now: 16x 8 Gbps = 100G ethernet PCIe 4: 16x 16 Gbps = 200 G ethernet PCIe 5: 16x 32 Gbps = 400 G ethernet Right now a 200G ethernet card is a silly thing with a thick internal cable that connects to a daughter PCIe board, so you can plug them into 2 full 16x slots in the motherboard. crazypenguin fucked around with this message at 22:43 on Jan 9, 2019 |
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Jan 9, 2019 22:32
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ufarn posted:Can someone quantify "thousands of 300mm wafers" for me? I think that's supposed to be a few days (3?) of output for that particular fab. Just a wild-rear end guess, but maybe this means a week of disruption? I don't think that will mean any price disruptions or shortages or anything, just "aw poo poo we set a bunch of money on fire" for TSMC.
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Jan 29, 2019 02:17
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k-uno posted:my experience with scientific computing... But maybe this isn't the case for typical high end consumer tasks? Correct. Scientific workloads are all optimized around wide SIMD operations on linear chunks of memory, because that's how you actually get maximum performance out of a CPU. Consumer workloads are all following pointers and stalling the CPU waiting for memory to arrive (i.e. RAM latency sensitive, not bandwidth sensitive.) Games are somewhere in the middle, but I wouldn't want to guess when a memory bandwidth bottleneck might appear, except that it's probably at least twice as many cores as you're used to, and very likely more. Khorne posted:I wonder if am5 with DDR5 will be quad channel. Probably not, but DDR5 is bringing twice the bandwidth anyway.
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Mar 3, 2019 04:27
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Combat Pretzel posted:Probably multi-bit data errors crashing the machine, that would otherwise not really have affected the system. I mean, it shouldn't crash the system unless it would likely have crashed the system anyway. But maybe hacky ECC on consumer hardware/firmware/software that doesn't really support it behaves badly. Anyway, yeah, I'm on board with "ECC should be the default, and its rarity on consumer platforms is a sign of this industry's stupid immaturity." For every game texture nobody cares about, you get "this major document I've been working on for weeks is corrupt! WTF" Along with people who have bad RAM and constant crashes and have no idea why and just think it's normal. ECC would diagnose the problem for them. It's not like it's actually that much more expensive. Most of the price difference right now is market discrimination, not actual additional costs.
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May 7, 2019 00:49
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MarsellusWallace posted:I've seen this bandied about a bunch of times - what does fast storage get you? I went from a Samsung 850 to a fast NVMe drive and other than file transfers have seen basically no difference. Even load times 'feel' very similar, We'll see, but the basic idea here is that an 8 core CPU can zlib decompress about 600 MB/s of input data (which is about what SATA can supply) using 100% of the CPU. Both consoles (I think? At least the PS5) will have hardware decompression in the SoC. This can decode as fast as the data can arrive, without using any CPU time. It's this hardware offload that's key. Basically, consoles went from spinning rust disks to SSDs, and immediately went "oh god, we definitely need to offload decompression!" and then they just did it. Meanwhile, there's no announced plans for that to come to PC yet. We're waiting on AMD/Intel for that. Still crickets. But at least Microsoft has announced DirectStorage, so as soon as this capability comes to PC hardware, there's a way to use it. Will it matter? Who knows, let's see. But at least in theory there's like 17x faster loading times possible there, or possibly adapting engines to just 100% eliminate them. That's pretty sweet.
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Jun 5, 2020 03:17
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GRECOROMANGRABASS posted:"No, it doesn't require physical connections... " implied remote microcode update? No, the only thing they're talking about there is being able to run these instructions from early boot. From a security perspective, that means only if you're already compromised.
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Mar 20, 2021 16:20
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BobHoward posted:Some Redditor figured out that the time is roughly 0x380000000000000 ticks of the chip's 2800 MHz TSC, which they interpret as significant thanks to all those zeroes. I'm less sure about this numerology, because 0x38 doesn't tingle my RTL designer spidey senses, but sometimes poo poo is weird and it's someone else's design I have no insight into. A redditor deciding the 1044 days is wrong and it's actually 1042 days and titling their post that way because of bullshit numerology they pulled out of their rear end because it has a pleasing number of zeros is hilarious
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Jun 3, 2023 20:44
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quote:AMD's NPU 16 TOPS I just wanted to edit that quote down to parse the performance numbers a little easier. I don't know if all this NPU stuff if going to matter, but at least back when the iphone XS came out, it's bump in NPU (to 5 TOPS) was really quite nice because it cut down on the latency for face id unlock. We'll see if literally anything as useful as face id comes of any of this, I guess. So far looking grim. Also interesting to see Qualcomm promising so much more than everyone else. Wonder if it's BS somehow. kliras posted:no idea how microsoft arrived at 45 tops as the sweet spot, maybe someone has some qualified guesses I think performance estimation is actually pretty easy with these things, so they probably just had a particular model in mind and a latency target. e: and it looks like Apple's A17 Pro is 35 TOPS, and A18 will probably come out at the same time, so maybe qualcomm isn't that far ahead of everyone here crazypenguin fucked around with this message at 17:36 on Apr 16, 2024 |
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Apr 16, 2024 17:32
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