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https://arstechnica.com/gadgets/2017/05/intels-itanium-cpus-once-a-play-for-64-bit-servers-and-desktops-are-dead/ rest in piiiiiiiiiiiiiiiiiiiiiiiissssssssssss
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May 11, 2017 21:19
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May 11, 2017 21:24
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rip no one cared
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May 11, 2017 21:27
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in the intel technology that got left in the dust by amd
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May 11, 2017 21:32
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can someone give me an explain like i'm 5 like uranium was a whole new instruction set not backwards compatible with x86 but amd just added into x86 to make x64?
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May 11, 2017 21:34
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rip itanium
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May 11, 2017 21:34
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i have no idea what i'm taking about
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May 11, 2017 21:34
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echinopsis posted:can someone give me an explain like i'm 5 itanium dumped the x86 baggage in the jump to 64-bit which is good because x86 is terrible but bad because it breaks compat with trash old software amd tacked on new 64-bit hotness to the x86 crapfest which is bad because it leaves x86 garbage littered around but good because you can still run trash old software
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May 11, 2017 21:35
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echinopsis posted:can someone give me an explain like i'm 5 there was too much poo poo crammed in there quote:Instructions on Itanium are grouped into chunks of three, known as bundles, and each of the three positions in a bundle is known as a slot. A bundle is 128 bits long (16 bytes) and always resides on a 16-byte boundary, so that the last digit of the address is always zero. The Windows debugging engine disassembler shows the three slots as if they were at offsets 0, 4, and 8 in the bundle, but in reality they are all crammed together into one bundle. https://soylentnews.org/article.pl?sid=15/08/08/0322238
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May 11, 2017 21:37
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Bloody posted:itanium dumped the x86 baggage in the jump to 64-bit which is good because x86 is terrible but bad because it breaks compat with trash old software lol dropping 16-bit instruction support when the processor was in 64-bit mode was seen as too extreme for some TurboGoobers out there
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May 11, 2017 21:40
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echinopsis posted:can someone give me an explain like i'm 5 yes
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May 11, 2017 22:40
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itanium has been dead for years. its VLIW instruction set was garbage and it tried to pawn off a whole bunch of difficult problems on the compiler. well, a compiler that solves those problems well never appeared because it's much harder to solve the problems at compile time than at run time. so while theoretically it was faster in practice it was terrible running real code. it was routinely spanked by x86 processors while using more power. basically it was a total disaster.
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May 11, 2017 22:55
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one of the things im doing at work is writing assembly code for a vliw chip, the isa is much more explicit than what ive seen of itaniums, but it's still some serious black magic to get it working well
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May 11, 2017 23:05
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fritz posted:one of the things im doing at work is writing assembly code for a vliw chip, the isa is much more explicit than what ive seen of itaniums, but it's still some serious black magic to get it working well hexagon?
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May 11, 2017 23:10
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ahhh good ol' diminishing_expectations.png
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May 12, 2017 03:03
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The Management posted:itanium has been dead for years. its VLIW instruction set was garbage and it tried to pawn off a whole bunch of difficult problems on the compiler. well, a compiler that solves those problems well never appeared because it's much harder to solve the problems at compile time than at run time. so while theoretically it was faster in practice it was terrible running real code. it was routinely spanked by x86 processors while using more power. basically it was a total disaster. i seem to remember someone in one of the threads that talked about itanium having actually worked on it and said that they actually did solve the compiler issues but the whole thing was laughably mismanaged on every level so it never had a chance anyway
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May 12, 2017 03:05
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echinopsis posted:can someone give me an explain like i'm 5 itanium had this great idea that like, man, what if the processor could do 6 instructions at once mannn turns out that's actually a bad idea because figuring out at any given point in a program you *can* do instructions simultaneously is real hard unless you specifically code poo poo with this special snowflake platform in mind which nobody's gonna do
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May 12, 2017 03:08
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a thing cant die if it never lived
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May 12, 2017 03:10
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i would really like to see a new big deal processor architecture that's not ARM or x86 some time just because i think it would be real interesting and the way computers do things has changed a bunch since the loving 1980's but that's never gonna happen lol or at least in the future when there's quantum neural cyberbrains or w/e they'll still have an x86 compatibility mode for running your company's lovely Java 5 accounting software
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May 12, 2017 03:13
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ate all the Oreos posted:i would really like to see a new big deal processor architecture that's not ARM or x86 some time just because i think it would be real interesting and the way computers do things has changed a bunch since the loving 1980's but that's never gonna happen lol https://riscv.org/
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May 12, 2017 03:18
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eh i guess, i was hoping for something more x86-y with a million loving instructions and extensions and stuff
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May 12, 2017 03:21
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ate all the Oreos posted:i would really like to see a new big deal processor architecture that's not ARM or x86 some time just because i think it would be real interesting and the way computers do things has changed a bunch since the loving 1980's but that's never gonna happen lol arm64 is an entirely new architecture that shares very little with the 32-bit arm ISA. it is designed for modern, high end processors.
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May 12, 2017 03:33
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ate all the Oreos posted:eh i guess, i was hoping for something more x86-y with a million loving instructions and extensions and stuff but that's garbage and actively defeats modern microarchitectures.
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May 12, 2017 03:35
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this too https://en.wikipedia.org/wiki/SuperH#J_Core
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May 12, 2017 04:52
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that isnt modern tho
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May 12, 2017 05:24
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ate all the Oreos posted:eh i guess, i was hoping for something more x86-y with a million loving instructions and extensions and stuff ah yes, you were hoping for something more like x86, but that isn't at all like x86.
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May 12, 2017 19:42
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arm64 is a really nice isa. in contrast, risc-v is garbage trash for idiots
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May 12, 2017 19:54
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May 12, 2017 20:00
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lol where is that graph from?
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May 12, 2017 20:06
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rjmccall posted:arm64 is a really nice isa. in contrast, risc-v is garbage trash for idiots i don't have any technical opinions but every weird architecture is supposed to be cheap and have quirky new setups like the hp moonshot thing and instead we get stupid crap from chinese companies trying to make a quick buck like the raspberry pi, orange pi, whatever the gently caress else pi
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May 12, 2017 20:14
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ate all the Oreos posted:itanium had this great idea that like, man, what if the processor could do 6 instructions at once mannn modern cpus are great at doing a million things at once, that's part of the problem. instruction bundles are like branch delay slots, a short-sighted attempt to work around microarchitecture limitations that engineers were already fixing by the time the hardware came out. vliw lets you trivially perform a couple operations at once, but a modern cpu wants to be doing way more in parallel than that, so it's going to end up scheduling arbitrary operations and resolving data dependencies and speculating all over the place, at which point what exactly are you getting from vliw? meanwhile there will always be places where the compiler is just like, well gently caress i need to do a poo poo-ton of loads here and i've got pretty limited flexibility to reschedule them so i guess i'm not filling all these bundles and code size is going to hell
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May 12, 2017 20:22
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That Robot posted:lol where is that graph from? the Itanium wikipedia page they compiled the various intel sales projections in to one handy graph
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May 12, 2017 20:31
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The Management posted:but that's garbage and actively defeats modern microarchitectures. x86 is a terrible isa but it's not because it's got a million instructions, it's because it's a variable-length unaligned format with a ton of prefixes and suffixes and special case operand encodings many of which vary depending on the current processor mode, so you can't even figure out where the next instruction starts without fully decoding the current one which is extremely complex to do
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May 12, 2017 20:33
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tty0 posted:ah yes, you were hoping for something more like x86, but that isn't at all like x86. yes exactly
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May 12, 2017 21:08
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Wait, what is the storage technology called? Pentanium? Or something? Optanium?
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May 12, 2017 21:33
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The Management posted:hexagon? no, and bossman gets testy when i say too much, once things get public rest assured i'll post in the terrible prog. thread about it
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May 12, 2017 21:39
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optaneium
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May 12, 2017 21:46
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rjmccall posted:x86 is a terrible isa but it's not because it's got a million instructions, it's because it's a variable-length unaligned format with a ton of prefixes and suffixes and special case operand encodings many of which vary depending on the current processor mode, so you can't even figure out where the next instruction starts without fully decoding the current one which is extremely complex to do it also has strict memory ordering that creates horrible unnecessary dependencies, exacerbated by instructions that directly reference memory operands (I know the uarch doesn't but it still has to maintain their transactional order for writeback). the register use in the ABI is awful. 16 registers and half of them are almost never touched in generated code.
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May 12, 2017 22:06
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fritz posted:no, and bossman gets testy when i say too much, once things get public rest assured i'll post in the terrible prog. thread about it no, post to a good thread
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May 12, 2017 22:10
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ate all the Oreos posted:i would really like to see a new big deal processor architecture is this even possible without the ability to license a metric buttload of patents. like the only people who can afford to do it are the ones who can keep
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May 13, 2017 00:43
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