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here's some mips for you https://youtu.be/nUevMxh5od0
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# ¿ Sep 11, 2017 01:53 |
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# ¿ May 6, 2024 01:10 |
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except RAM wasn't very fast relative to the CPU even by the mid-late 1980s while (say) an 8MHz 68000 gave you 125ns bus cycles, workstation class hardware was going to 25MHz with a corresponding 40ns cycle time by 1987-88, hence the substantial growth of L2 and then L1 cache hell, my circa 1989 Mac IIci had a slot for a cache RAM card, I had the Apple one that added 32KB of 35ns cache and made a visible difference, and Micron made up to a 128KB cache card RISC was proposed as a win because instead of complex operations each taking multiple cycles, you could do simple operations at an average of one per cycle (given good instruction pipelining and branch prediction, and compiler assistance with that) and wind up with higher throughput, especially by isolating external memory access (even cache) from other processing it actually was a win in that way too, it certainly beat the CISC designs of the day through the early 2000s, many people just didn't foresee Intel (and AMD) being able to keep up by implementing dynamic instruction translation in hardware like they wound up doing of course once they got the low hanging fruit, the RISC designs started adding more complicated instructions that were harder to implement and make faster with chip generations, to the point where PowerPC was mocked at its introduction for having more instructions than the “CISC” 6502, which culminated with everyone adding Cray-style vector instructions
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# ¿ Sep 13, 2017 02:55 |
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one thing I want to see is the relative performance of something like the BYTE UNIX benchmark on a wicked awesome late 1990s SGI workstation and a little embedded Linux based router or something with a MIPS SoC
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# ¿ Sep 13, 2017 03:00 |
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people thought that about the Raspberry Pi vs SPARCstation 20 and were wrong
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# ¿ Sep 15, 2017 05:55 |