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There’s also “Engineering a Compiler: VAX-11 Code Generation and Optimization” written by and about the VAX-11 PL/I compiler team’s work, for a look at the interplay between hardware and software for a brand new platform.
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Aug 7, 2021 09:06
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JawnV6 posted:I designed something with a MSP430, it had a capacitive sensor. I hate MSP430s. Used them in space applications (at the time, it was the 'lol FRAM is invincible logic') and ran into the same issues as above, but due to I2C. No built in CAN controller also sucked. FRAM is destructive reads, so IIRC, at least the FR5969 had a stupidly large amount of die area spent on capacitance to help not corrupt itself upon power loss. Also -- thanks for this thread appearing! I had typed up a vague OP with a list of random archs to toss out for discussion, but it's now lost to the ages. Anyone use any of the weird Japanese market uArchs? NEC V850s were popular in automotive for a short bit of time -- I'm still fascinated by how many of those uArchs are still running around even with Cortex-M eating everything. That market tends to be insular / leverage local suppliers, so some of those are gonna be around for awhile.
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Aug 7, 2021 20:12
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CommieGIR posted:Tried to power up the Power 770s but the HMC is toast so if I want to boot them I'll need another HMC or connect to them serially to boot Ever get things going to the point of loading up an OS and running any benchmarks btw?
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Aug 7, 2021 21:18
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Gwaihir posted:Ever get things going to the point of loading up an OS and running any benchmarks btw? Gonna get there, work has had me loaded down.
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Aug 7, 2021 23:08
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movax posted:I hate MSP430s. Used them in space applications (at the time, it was the 'lol FRAM is invincible logic') and ran into the same issues as above, but due to I2C. No built in CAN controller also sucked. FRAM is destructive reads, so IIRC, at least the FR5969 had a stupidly large amount of die area spent on capacitance to help not corrupt itself upon power loss. What kinda cool space stuff did you work on? Is CAN-bus used for space applications too? Selklubber fucked around with this message at 18:44 on Aug 8, 2021 |
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Aug 8, 2021 18:36
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Got the Power 770's reset, added to a Virtual HMC, and got a console! Trying to boot Ubuntu from USB via the SMS menu now! Unfortunately it seems to hang after GRUB launches. But progress! In the meantime, we've got all the resources available: 24 CPUs and 256GB of RAM. Took some troubleshooting because it wasn't bringing up both nodes originally, turns out the cross connect bridge was loose. CommieGIR fucked around with this message at 02:00 on Aug 9, 2021 |
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Aug 9, 2021 01:56
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Port NetBSD!
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Aug 9, 2021 01:59
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This chunky fucker sucked down double my normal amps during the firmware factory reset: Normally hovers around ~7Amps with everything running, this guy added another 7 on top of it. 
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Aug 9, 2021 02:08
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eschaton posted:Port NetBSD! Considering there’s a cheerful lunatic porting Slackware to Power, I’m shocked NetBSD doesn’t support it. Maybe CommieGIR can offer some level of server access to an OSS project. Hasturtium fucked around with this message at 02:49 on Aug 9, 2021 |
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Aug 9, 2021 02:47
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Hasturtium posted:Considering there’s a cheerful lunatic porting Slackware to Power, I’m shocked NetBSD doesn’t support it. Maybe CommieGIR can offer some level of server access to an OSS project. If anyone would like access to a Power VM, sure. Right now gotta get the disks partition and OS setup, but we're 90% of the way there. There's also a Power8 server at work that may fall into my possession here soon.
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Aug 9, 2021 02:53
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Selklubber posted:What kinda cool space stuff did you work on? Is CAN-bus used for space applications too? Mostly CubeSats / small spacecraft, and then one deep-space mission before everything ran out of money. People are making rad-tolerant CAN transceivers now, so it’s gaining a bit of traction with the newer players. Other common space architectures are SPARC, and a few folks are getting ARM and RISC-V up-to-snuff to get flying. POWER of course is represented — RAD750 runs both Curiosity and Perseverance.
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Aug 9, 2021 06:44
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Anyone here know much about Intel i960? I've used a bunch of equipment built around that chip, most of which was an upgrade from the company's previous hardware platform of multiple z80-based uCs (Hitachi HD64180) and a TI TMS320C20.
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Aug 9, 2021 07:03
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corgski posted:Anyone here know much about Intel i960? I've used a bunch of equipment built around that chip, most of which was an upgrade from the company's previous hardware platform of multiple z80-based uCs (Hitachi HD64180) and a TI TMS320C20. IIRC it was a victim of politics / lawsuits, but it was popular in RAID controllers, military applications and its design-intent was to support high-reliability applications by designing silicon around the expected usage of very high-level languages like Ada where memory safety, garbage collection and so on were all first class citizens.
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Aug 9, 2021 07:35
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corgski posted:Anyone here know much about Intel i960? I've used a bunch of equipment built around that chip, most of which was an upgrade from the company's previous hardware platform of multiple z80-based uCs (Hitachi HD64180) and a TI TMS320C20. It’s basically a RISCish 32-bit microcontroller completely unrelated to the i860. I think there were variants with MMUs but the only “computer” applications I’ve ever seen any i960 in were a couple of X terminals, otherwise they were mainly used for things like high-end storage controllers.
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Aug 9, 2021 20:02
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Huh. With that target market it seems weird that it’d find its way into an entertainment lighting controller unless they were just really obsessed with having a single chip that could do everything instead of one or more general purpose CPUs and a DSP for fast 8/16-bit integer matrix multiplication. The equipment by the way is later revisions of the ETC Expression/Insight/Express line of lighting consoles, as well as a bunch of the same company’s architectural lighting controls. corgski fucked around with this message at 20:16 on Aug 9, 2021 |
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Aug 9, 2021 20:13
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JawnV6 posted:https://www.tomshardware.com/news/ascenium-reinvent-the-cpu Ascenium Wants to Reinvent the CPU - And Kill Instruction Sets Altogether "The magic compiler will save us", but now with LLVM. Anyone had luck with any of the HLL->FPGA tools? I have not been impressed.
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Aug 9, 2021 23:58
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Supposedly that’s SiFive’s bread and butter via Chris Lattner and others’ MLVM project.
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Aug 10, 2021 04:16
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Reading the wiki page for the i960 led me to the Am 29000, which I'd never heard of. Long story short, it was AMD's flavor of Berkeley RISC, and lived long enough to grow into a superscalar design. The last iteration had some of its functional units swiped for use in the K5 architecture, which is off-topic for this thread.
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Aug 10, 2021 05:39
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movax posted:I hate MSP430s. Used them in space applications (at the time, it was the 'lol FRAM is invincible logic') and ran into the same issues as above, but due to I2C. No built in CAN controller also sucked. FRAM is destructive reads, so IIRC, at least the FR5969 had a stupidly large amount of die area spent on capacitance to help not corrupt itself upon power loss. What's the smallest thing with an integrated CAN? M3 or better? When I was jobless and kinda hungry for work I asked a robot startup I'd talked with, they were having CAN gremlins and really needed that specific expertise. It sounds like a ridiculous bus, swings that would zap most stuff are the norm. PCjr sidecar posted:"The magic compiler will save us", but now with LLVM.
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Aug 10, 2021 23:32
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movax posted:Mostly CubeSats / small spacecraft, and then one deep-space mission before everything ran out of money. People are making rad-tolerant CAN transceivers now, so it’s gaining a bit of traction with the newer players. Other common space architectures are SPARC, and a few folks are getting ARM and RISC-V up-to-snuff to get flying. POWER of course is represented — RAD750 runs both Curiosity and Perseverance. Oh that's cool. I like reading about space computers and stuff. I mostly worked with PLCs, and worst case if you gently caress up the programming remotely you have to take a plane to the other side of the country to fix it. Must be exiting/assclenchingly to make stuff that can't be easily reprogrammed.
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Aug 11, 2021 00:15
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I now have an HP 3000-917LX minicomputer too. It’s a PA-RISC 1.1 system whose design is mostly shared hardware with the HP 9000-807 server, the big differences being that the 3000 runs MPE/iX and the 9000 runs HP-UX and there’s a different primary I/O board. 128MB of RAM and 4GB of disk, which isn’t too shabby for a system built in 1991. Unfortunately I haven’t been able to fully boot it yet, it’s pretty unhappy with the contents of the NVRAM/RTC. I need to figure out how to reset those to a reasonable state from the management console before bringing up the main CPU and booting MPE/iX. I might even have to reinstall everything from scratch. Hopefully I can find the necessary stuff to do so… MPE/iX on PA-RISC is interesting: The HP 3000 mini was a 16-bit system, and the PA-RISC variant of MPE uses a CPU emulator with mixed-mode support to run old code—including some parts of the OS! Very reminiscent of the way mixed-mode calling worked on the Power Mac, including some of the reasons why, except HP did it a few years ahead of Apple. One weird thing about MPE: Users and directories (with no nesting) are “in” accounts, directories are called “groups,” and all of files, users, groups, and accounts can have distinct passwords. Also, get this: Paths are backwards! The path POOPCHRT.POOPERS.BUTTHEAD indicates the file POOPCHRT in the POOPERS group in the BUTTHEAD account, which the user BEAVIS might log in to in order to update.
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Aug 30, 2021 10:19
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Just discovered a Sun Ultra 10 in the crawlspace under my house. Trying to decide if I want to ask the landlord about it or just let sleeping SPARCs lie; god knows I've got enough old computer hardware around already.
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Sep 2, 2021 22:06
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Someone on Twitter found a "RISC-V High Performance Engineer" job posting from Apple -- what are they up too, I wonder...
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Sep 2, 2021 22:27
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Pham Nuwen posted:Just discovered a Sun Ultra 10 in the crawlspace under my house. Trying to decide if I want to ask the landlord about it or just let sleeping SPARCs lie; god knows I've got enough old computer hardware around already. Mail it to me? I could use a SPARC, if your landlord doesn’t care.
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Sep 2, 2021 22:44
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Hasturtium posted:Mail it to me? I could use a SPARC, if your landlord doesn’t care. I don't even know if it works, and the shipping would be hells of expensive, and when I look at your avatar I worry that you might try to revive Plan 9's sparc64 kernel and that's just not good for anyone 
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Sep 2, 2021 22:57
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Pham Nuwen posted:I don't even know if it works, and the shipping would be hells of expensive, and when I look at your avatar I worry that you might try to revive Plan 9's sparc64 kernel and that's just not good for anyone If it doesn’t work I’ll Frankenstein an x86 machine or a cluster of Pi’s into it. You can trust me! And I solemnly swear Plan 9 will not find a home there. Heck, if you want to see if it powers on that’d be a useful first step. I’ll cover shipping if it comes down to it.
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Sep 2, 2021 23:15
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Hasturtium posted:If it doesn’t work I’ll Frankenstein an x86 machine or a cluster of Pi’s into it. You can trust me! And I solemnly swear Plan 9 will not find a home there. If I ask the landlord about it and he says I can have it, and if it powers up, and if I don't want to keep it myself because I have always kinda liked Sun hardware, I'll check in with you.
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Sep 2, 2021 23:17
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It’s a deal. Thank you. 
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Sep 2, 2021 23:23
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movax posted:Someone on Twitter found a "RISC-V High Performance Engineer" job posting from Apple -- what are they up too, I wonder... Wow. I had seen some article header about RISC-V multicore linux capable cpus and wonder if that’s what they’re getting into first perhaps. Something in the data center (no idea what) or perhaps a new wifi base station powered by one? Oh it was the new SiFive boards and I was excited til I saw they were $999, lol.
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Sep 2, 2021 23:31
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priznat posted:Wow. I had seen some article header about RISC-V multicore linux capable cpus and wonder if that’s what they’re getting into first perhaps. Something in the data center (no idea what) or perhaps a new wifi base station powered by one? Newer than the Unmatched? Because those are going for a mere $680. Which is more than my alternative CPU-curious rear end can rationalize for sub-Raspberry Pi 4-class performance, but I know boutique hardware will never be cost-competitive with commodity kit.
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Sep 2, 2021 23:34
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Hasturtium posted:Newer than the Unmatched? Because those are going for a mere $680. Which is more than my alternative CPU-curious rear end can rationalize for sub-Raspberry Pi 4-class performance, but I know boutique hardware will never be cost-competitive with commodity kit. Oops weird, in my search results it said 5 days ago but the article (for the unleashed) was actually from 2018. I coulda sworn I saw some new RISC V server article pop up recently which I did a mental note to read then forgot about.
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Sep 2, 2021 23:45
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priznat posted:Wow. I had seen some article header about RISC-V multicore linux capable cpus and wonder if that’s what they’re getting into first perhaps. Something in the data center (no idea what) or perhaps a new wifi base station powered by one? They clearly have good ‘little’ ARM cores, but I wonder if they’re looking for something NVIDIA Falcon like, where it supports NoCs / things like that. Seems perfect to brew your own RV32/RV64 and pay $0 licensing / royalties.
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Sep 2, 2021 23:51
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movax posted:They clearly have good ‘little’ ARM cores, but I wonder if they’re looking for something NVIDIA Falcon like, where it supports NoCs / things like that. Seems perfect to brew your own RV32/RV64 and pay $0 licensing / royalties. Yeah very interesting especially if they can stamp them into other silicon for some built in telemetry or control plane. Security processor perhaps hence the performance? Sky’s the limit really.
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Sep 2, 2021 23:57
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priznat posted:Yeah very interesting especially if they can stamp them into other silicon for some built in telemetry or control plane. Security processor perhaps hence the performance? Sky’s the limit really. Oh — duh, maybe in their baseband processors for the inevitable Apple modems!
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Sep 3, 2021 00:10
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movax posted:Oh — duh, maybe in their baseband processors for the inevitable Apple modems! Oooh yeah good call. That’d be perfect for it. I wonder if it’ll get use first on wireless chips for smaller products like the homepods (still think they should do a homepod/mesh wifi network thing) and then get rolled into 5G modems.
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Sep 3, 2021 00:19
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Why settle for the 32MB of L3 cache per chiplet that AMD offers when you could have 32MB of L2 per core instead? https://www.anandtech.com/show/16924/did-ibm-just-preview-the-future-of-caches (Note: you only get virtual L3/L4) Another article says that the CPU will have an on-board 6TFLOP AI accelerator. The claimed benefit is that instead of giving each core AVX512 instructions, you concentrate all that logic into one accelerator which any core can access.
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Sep 3, 2021 08:57
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That's going to cause some interesting stall situations. Imagine you have 16 threads (as in pre-emptive multitasking execution threads, not simultaneous multithreading logical processors) that all want to access the AI accelerator and now need to schedule what order they each get to run their code in. Now you need to worry about saving/flushing/uploading/restoring state between each invocation, across each core, including situations where now you need to save and flush your thread's AI accelerator state to memory because there are 15 other threads ahead of you in the accelerator's work queue and you can't just idle because there's other non-accelerator-touching code to be executed. I've not really been a fan of AVX because of the power/thermals/clock speed implications it has but losing 100 MHz on your all-core turbo when an AVX instruction enters the pipeline is preferable to having to completely re-juggle your scheduled threads in the event that one thread needs more linear time chugging away at a parallel vector math problem, because now processor X is hogging the AI accelerator and processors A through F are waiting for it to finish up and release the lock on the accelerator or process its job instead of just being able to do 8xFP64 FMAs in a normal ISA extension instruction that executes in series with the rest of the code. I suppose in an incredibly optimized environment it could have some excellent advantages because the CPU cores can be munching on some data returned from the AI accelerators in the integer/ALU path while they wait for their next AI job to be executed but since my low-level field of expertise is primarily in the memory/ALU space and not in the SIMD/vector space I'm not really sure what the difference is between this and an on-chip GPU that has no video output and only accepts compute shaders other than not having to deal with the overhead of needing to compile generic compute shader code to the shader cores' machine language. (Disclaimer: I do not do kernel-level task scheduling algorithms for a living, just for fun. There are people who actually know more about this than I do and have written papers on it. I am just some dick who writes weird custom kernel poo poo for fun.)
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Sep 3, 2021 09:39
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Pham Nuwen posted:Just discovered a Sun Ultra 10 in the crawlspace under my house. Trying to decide if I want to ask the landlord about it or just let sleeping SPARCs lie; god knows I've got enough old computer hardware around already. I refurbished my Ultra 10 two years ago and played around with the different BSD flavours. Eventually I went back to Solaris 9 (to have proper hardware acceleration on the Creator3D card)... it's a fun machine to doodle around with and I boot it up whenever I'm in the mood for some C coding.
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Sep 3, 2021 14:58
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movax posted:Someone on Twitter found a "RISC-V High Performance Engineer" job posting from Apple -- what are they up too, I wonder... Negotiating leverage for when the acquisition closes and Jensen needs to boost his spatula budget.
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Sep 4, 2021 17:58
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PCjr sidecar posted:Negotiating leverage for when the acquisition closes and Jensen needs to boost his spatula budget. Lol I was wondering what the ARM royalties are like for Apple, so they have fixed ones they have to re-up after x years or is it more fluid? They have got to be one of the biggest licensees of it.
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Sep 4, 2021 18:03
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