Non-x86 Platforms Thread: running in the 90s

The Something Awful Forums > Discussion > Serious Hardware / Software Crap > Non-x86 Platforms Thread: running in the 90s

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cathoderaydude: Nov 23, 2024; bandwidth on demand

Kazinsal posted:

It's FOSS, there's always gonna be a That Guy for any imagined scenario

it's so goddamn convenient because you can have an unhinged freakout over a person who's mad at the computer for stupid reasons and even if it turns out you imagined that person, don't worry, they exist. you're safe

# ? Nov 6, 2025 03:33

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# ? Nov 8, 2025 18:58

BlankSystemDaemon: Mar 13, 2009

Phew, dodged that bullet - who�d want to be wrong on the internet?
_{_{_{Joke�s aside, it�s fine - life is very much A gently caress right now}}}

# ? Nov 6, 2025 06:51

cdc: May 28, 2007; Get off my lawn!

It really is. Thank god we have old/weird computers and OSs to mess around with.

# ? Nov 6, 2025 15:08

Beve Stuscemi: Jun 6, 2001

I'm on round three of trying to get a working Sparcstation 5 going :pray:

This arrived from ebay today and is by far the cleanest board I've had yet, the original being full of mechanics shop dust, and the second having some sort of leakage on it that the seller didnt disclose. Hopefully this one works, and also hopefully my RAM works, since I havent really been able to test that with two bad boards

# ? Nov 6, 2025 20:21

cathoderaydude: Nov 23, 2024; bandwidth on demand

Beve Stuscemi posted:

I'm on round three of trying to get a working Sparcstation 5 going

This arrived from ebay today and is by far the cleanest board I've had yet, the original being full of mechanics shop dust, and the second having some sort of leakage on it that the seller didnt disclose. Hopefully this one works, and also hopefully my RAM works, since I havent really been able to test that with two bad boards

1) clean af hell yeah brother

2) never gonna stop being entertained by suns custom dallas (sallad) puller that just lives permanently on the socket

# ? Nov 6, 2025 21:00

some kinda jackal: Feb 25, 2003

One day I'll find a -110 for my SS5. That looks clean as hell, and congrats on the -85!

some kinda jackal fucked around with this message at 21:14 on Nov 6, 2025

# ? Nov 6, 2025 21:08

Beve Stuscemi: Jun 6, 2001

I have a 110, but its dead :negative:

At this point, I just want one that runs, speed be damned

# ? Nov 6, 2025 21:17

some kinda jackal: Feb 25, 2003

The chip is dead? Because if the chip isn't dead, and this mobo on your -85 works, then congratulations: you have a working 110 again :haw:

It's funny how important these little speed bumps were back in the day. Now my CPU jumps from like 2.5 to 3.0ghz and I don't even notice.. Going from a 486-66 to a P5-133 was loving insane, and I imagine going from -70 to -110 will be magical too, once I get there.

# ? Nov 6, 2025 21:19

Colostomy Bag: Jan 11, 2016; C-Bangin' it

Heh, I remember getting the Pentium 60. With of course the floating point error.

# ? Nov 6, 2025 21:25

Beve Stuscemi: Jun 6, 2001

some kinda jackal posted:

The chip is dead? Because if the chip isn't dead, and this mobo on your -85 works, then congratulations: you have a working 110 again

Oooooooh, its drop-in? Yeah, assuming I can get this board working reliably, I'll throw that 110 in there because I have a suspicion the board is the problem, not the CPU

# ? Nov 6, 2025 21:26

cdc: May 28, 2007; Get off my lawn!

Beve Stuscemi posted:

I'm on round three of trying to get a working Sparcstation 5 going

This arrived from ebay today and is by far the cleanest board I've had yet, the original being full of mechanics shop dust, and the second having some sort of leakage on it that the seller didnt disclose. Hopefully this one works, and also hopefully my RAM works, since I havent really been able to test that with two bad boards

Mmmm, minty fresh sparc spare.

# ? Nov 6, 2025 22:23

some kinda jackal: Feb 25, 2003

Beve Stuscemi posted:

Oooooooh, its drop-in? Yeah, assuming I can get this board working reliably, I'll throw that 110 in there because I have a suspicion the board is the problem, not the CPU

You know what, I say that, and I have a distinct memory of reading something to this effect, but I have a terrible habit of passing off things I read online as fact. I'll do some research because my intent is to drop a 110 into my 70 and it's going to be lame if I get that and it doesn't work.

# ? Nov 6, 2025 22:35

McGlockenshire: Dec 16, 2005; GOLLOCKS!

Beve Stuscemi posted:

That's a beautiful board right there!

Continuing my 990 stuff! Let's talk about the TMS9940, the almost-awesome boondoggle that almost sunk the platform.

Our 990 generations, sloppily and inaccurately:

990/9: TTL & discrete logic minicomputer
TMS9900: CPU board of the 990/9 put on a chip and then used to power the 990/4, 990/10, and later, the 990/5
TMS9940, TMS9980A, TMS9981, TMS9985: crippled 40-pin 8-bit bus variations on the 9900 <- WE ARE HERE
990/12: "Let's rip out the underpinnings and rebuild the world in an Extensible(tm) way so that we can do native floating point."
TMS9995: A working 40-pin, 16-bit address bus, 8-bit data bus version of the 9900, instead of a crippled variation
TMS99105A, TMS99110A; 990/10A: "Maybe we can just improve things incrementally instead of rebuilding the world. Floating point can be bolted on."

All four third generation chips have exactly two things in common: 40 pins and an 8-bit bus. They are, logically, named in an order that gives you no sense whatsoever about what they can do and how they compare to other models.

Cutting pins means cutting functionality. The 9900 requires a four-phase clock input on four pins and emits explicit bus signals that are identical to or derived from the CPU board(s) in the original 990/9. Most of those signals can be derived or implied and thus discarded. Same with the clock, they made it a normal oscilator input. They decided to keep the address bus and data bus on separate pins instead of saving space and multiplexing them. The '80A and '81 have an 8-bit data bus, a 14-bit address bus (16kb), and only four interrupt levels (while adding even more responsibility to Interrupt 2!). The '80A still requires -5 volts, but the '81 doesn't. The '81 includes some different options for hooking up the crystal on that finally-gone power pin. IIRC from the stories, the '80 (no A) was going to be put in the 99/4, but we never ended up seeing the '80, just the '80A. This explains some of the weird design decisions and their consequences, but that's another post and I need to find that source.

So with those two out of the way, I can introduce the '40 and her extroverted bigger brother, the '85. They each operate at a 5MHz bus speed, one whole megahurts faster than the others. They also introduce an internal 14-bit decrementer. You can program it with certain CRU bits, and it'll count down once every 15 bus cycles until exhausted, then throw an interrupt. It can also be programmed instead to use an external signal called EC for Event Counter, which as you might expect deincrements once per bus cycle when active. They also each feature a dedicated single-bit data transfer bus (YES, ANOTHER ONE, ANOTHER loving BUS), designed and intended for interprocessor communication. More on that in a bit, it's so goddamn dumb.

The '40 comes in two models, the TMS9940M and the TMS9940E. Those letters might be surprising given the pattern we see in the naming of the time, appending an "A" to the model number of a revision. But here, those letters mean something. The M stands for "masked" and the E stands for "erasable." As in ROM. It has no external data or instruction bus. Inside, there's a whopping 128 bytes of RAM, and the EPROM version (that's the kind with the UV-erasure window) gives you 2kb of space.

The '40 is an embedded microcontroller.

Up until that point, it and the '85 are identical. The '85 has a full 16-bit address bus and an 8-bit data bus. The '40 does have an external address bus, but it's for the CRU only. Sixteen of the other pins are mapped to a bank of internal CRU bits. They can be individually configured as input or output, and addressed by the CRU instructions like any regular data.

The '40 is an embedded microcontroller with programmable GPIO.

Oh, and you can also reconfigure the bank of eleven pins used by the external CRU address and bus, turning them into GPIO. And you can do the same for the hold/external CPU signal pins. And the timing pins. 16 total.

The '40 is an embedded microcontroller with 16 pins of dedicated, and up to 32 pins total, programmable GPIO. In 1978.

Microcontrollers with programmable GPIO existed at the time, but the microcontroller platform to end all microcontroller platforms, the 8051, was two years out. These guys knew they had magic on their hands and then TI does TI things.

If they'd done parallel CRU access like the '100s, these things could have been awesome. Instead you still have to sample each pin one at time, once per bus cycle. 16 bits? 16 bus cycles. It turns out that being able to read parallel data on your internal comunication bus is very useful, but it took three or four years to learn that lesson. The winning microcontroller designs worked on parallel bytes, while TI really loved their simple dumb serial bus.

Their seeming objection to dealing with parallel data on this thing extends to their weird interprocesor communications bus. Just read about their intended use case for this feature:

That's from the marketing chapter. This is from the tech chapter:

The Osbourne 16-Bit Microprocessor Handbook describes the nuttery in another way and then builds a pathological demo:

Okay, prepare your soul for Figure 3-22.

Yeah, I'm totally gonna feed my 16 bit processor instructions one bit at a time. Let's not discuss that feature any more, it's silly.

So if the '40 has all this programmable GPIO niftyness, what does the '85 have? Well, you get zero of the dedicated GPIO pins, but you can reassign the two clock/event timer pins as GPIO. Just those two.

There's zero magic at all to the '40's functionality here. Everything it does can be done with external hardware like a handful of bidirectional latches and some glue logic. They list the logc diagram in the manual, even. Keeping that in mind, here's how TI decided to describe the '40:

It's not a microcontroller, no sir, it's a microcomputer. Those additional instructions are hijacking XOPs 0, 1, and 2 instead of being real instructions. Cowards.

They really, really wanted you on their platform, or, perhaps, on TYMSHARE:

We'll talk a bit about option 2 , AMPL, later, and for one and only one reason.

All of those are just a 990/4 with specific accessories, yet get their own prefixes. Infuriating, impossible bullshit to search for. Damnit, TI.

GIVE US YOUR ROMS! WE DON'T CARE HOW! PAPER TAPE, PUNCHCARDS, ANYTHING, PLEASE, PLEASE!

OH GOD PLEASE WE WANT TO HAVE YOUR ROMS

But apparently the '40 didn't work.

What "didn't work" actually means is somewhat vague. It doesn't mean that it wasn't produced. We can find plenty of '40s on ebay, but they're all masked ROMs and thus useless to hobbyists. One source I found and failed to bookmark (95% chance of being an Atari Age thread) suggested that the main problem was a huge defect rate at the manufacturing level. It's unclear if this is for the device as a whole, or just for the masked ROMs.

The only good authoratative reference for this stuff is an article written the guy that lead the 9995 team.

quote:

In those days it all could go very wrong and it did for a 16-bit CPU call the 9940 and a spinoff version the 9985 that were design in Houston Texas in 1977-1978. It went so bad that the both the 9940 and 9985 were never fully functional, causing the designer to be discredited (whether at fault or not) and many people to leave.

In the wake of the 9940/9985 disaster, in 1979 management pick me, the young hotshot only 1.5 years out of college, to lead the architecture and logic design of a new CPU, the TMS9995, to replace the failed TMS9985. There was one hitch, they wanted to use a TI design group in Bedford England. So after some preliminary work, I packed up for a 6 month assignment in Bedford where I first met Derek Roskell.

To say Derek is a self-deprecating is a gross understatement. The U.S. managers at TI at the time were more the self-assertive, aggressive, �shoot from the hip,� cut corners (which resulted in the 9940/9985 debacle) and generally didn�t take well to Derek�s �English working class� (said with great affection) style with the all too frequent laugh at the �wrong� time.
[...]
Upper management was always pressuring to get thing done faster which could only be accomplished by cutting corners. They called Bedford a �country club� for resisting the pressure. Derek was willing to take the heat and do things the �right way� because he understood the consequences of cutting corners.

The title of the article? �If you haven�t tested it, it doesn�t work�.

edit: Hey, have you checked your backups lately? If you haven't tested them, they don't work.

McGlockenshire fucked around with this message at 00:01 on Nov 7, 2025

# ? Nov 6, 2025 23:45

AlexDeGruven: Jun 29, 2007; Watch me pull my dongle out of this tiny box

Colostomy Bag posted:

Heh, I remember getting the Pentium 60. With of course the floating point error.

I was dating a girl that bought a Pentium 90 at the time. I don't think it ever bit her, though.

And reminiscing further, my first IT job was flashing the BIOS on Compaq 590s for Y2K. 95% of which never got redeployed.

# ? Nov 7, 2025 00:31

Beve Stuscemi: Jun 6, 2001

Hell yes I FINALLY have a working Sun SS5! I put the new motherboard in, put a stick of RAM in and it boots up!!

It has been a million years since I've actually had to use one of these, so I'm a bit rusty

On boot it says:

code:

Power-ON Reset

$$$$$ WARNING: No Keyboard Detected! $$$$$
MMU Context Table Reg Test
MMU Context Register Test
MMU TLB Replace Ctrl Reg Tst
MMU Sync Fault Stat Reg Test
MMU Sync Fault Addr Reg Test
MMU TLB RAM NTA Pattern Test
MMU TLB CAM NTA Pattern Test
MMU TLB LCAM NTA Pattern Test
IOMMU SBUS Config Regs Test
IOMMU Control Reg Test
IOMMU Base Address Reg Test
IOMMU TLB Flush Entry Test
IOMMU TLB Flush All Test
SBus Read Timeout Test
EBus Read Timeout Test
D-Cache RAM NTA Test
D-Cache TAG NTA Test
I-Cache RAM NTA Test
I-Cache TAG NTA Test
Memory Address Pattern Test
FPU Register File Test
FPU Misaligned Reg Pair Test
FPU Single-precision Tests
FPU Double-precision Tests
FPU SP Invalid CEXC Test
FPU SP Overflow CEXC Test
FPU SP Divide-by-0 CEXC Test
FPU SP Inexact CEXC Test
FPU SP Trap Priority >  Test
FPU SP Trap Priority <  Test
FPU DP Invalid CEXC Test
FPU DP Overflow CEXC Test
FPU DP Divide-by-0 CEXC Test
FPU DP Inexact CEXC Test
FPU DP Trap Priority >  Test
FPU DP Trap Priority <  Test
PROC0 Interrupt Regs Tests
Soft Interrupts OFF Test
Soft Interrupts ON Test
PROC0 User Timer Test
PROC0 Counter/Timer Test
DMA2 E_CSR Register Test
LANCE Address Port Tests
LANCE Data Port Tests
DMA2 D_CSR Register Test
DMA2 D_ADDR Register Test
DMA2 D_BCNT Register Test
DMA2 D_NADDR Register Test
ESP Registers Tests
DMA2 P_CSR Register Test
DMA2 P_ADDR Register Test
DMA2 P_BCNT Register Test
PPORT Registers Tests
NVRAM Access Test
TOD Registers Test
initializing TLB
initializing cache

Allocating SRMMU Context Table
Setting SRMMU Context Register
Setting SRMMU Context Table Pointer Register
Allocating SRMMU Level 1 Table
Mapping RAM
Mapping ROM

ttya initialized
Probing Memory Bank #0 32 Megabytes
Probing Memory Bank #1 Nothing there
Probing Memory Bank #2 Nothing there
Probing Memory Bank #3 Nothing there
Probing Memory Bank #4 Nothing there
Probing Memory Bank #5 Nothing there
Probing Memory Bank #6 Nothing there
Probing Memory Bank #7 Nothing there
Starting real time clock...
Incorrect configuration checksum;
Setting NVRAM parameters to default values.
Setting diag-switch? NVRAM parameter to true
Probing CPU FMI,MB86904
Probing /iommu@0,10000000/sbus@0,10001000 at 5,0  espdma esp sd st SUNW,bpp ledma le
Probing /iommu@0,10000000/sbus@0,10001000 at 4,0  SUNW,CS4231 power-management
Probing /iommu@0,10000000/sbus@0,10001000 at 1,0  Nothing there
Probing /iommu@0,10000000/sbus@0,10001000 at 2,0  Nothing there
Probing /iommu@0,10000000/sbus@0,10001000 at 3,0  Nothing there
Probing /iommu@0,10000000/sbus@0,10001000 at 0,0  Nothing there
screen not found.
Can't open input device.
Keyboard not present.  Using tty for input and output.
Probing Memory Bank #0 32 Megabytes
Probing Memory Bank #1 Nothing there
Probing Memory Bank #2 Nothing there
Probing Memory Bank #3 Nothing there
Probing Memory Bank #4 Nothing there
Probing Memory Bank #5 Nothing there
Probing Memory Bank #6 Nothing there
Probing Memory Bank #7 Nothing there
Starting real time clock...
Incorrect configuration checksum;
Setting NVRAM parameters to default values.
Setting diag-switch? NVRAM parameter to true
Probing CPU FMI,MB86904
Probing /iommu@0,10000000/sbus@0,10001000 at 5,0  espdma esp sd st SUNW,bpp ledma le
Probing /iommu@0,10000000/sbus@0,10001000 at 4,0  SUNW,CS4231 power-management
Probing /iommu@0,10000000/sbus@0,10001000 at 1,0  Nothing there
Probing /iommu@0,10000000/sbus@0,10001000 at 2,0  Nothing there
Probing /iommu@0,10000000/sbus@0,10001000 at 3,0  Nothing there
Probing /iommu@0,10000000/sbus@0,10001000 at 0,0  Nothing there

SPARCstation 5, No Keyboard
ROM Rev. 2.15, 32 MB memory installed, Serial #11184810.
Ethernet address aa:aa:aa:aa:aa:ae, Host ID: aaaaaaaa.


The IDPROM contents are invalid

Boot device: /iommu/sbus/ledma@5,8400010/le@5,8c00000  File and args:
Internal loopback test -- Did not receive expected loopback packet.

Can't open boot device

Type  help  for more information

All of this looks fairly normal to me, let me know if any of you spot something horrible.

I then hit it with a:

code:

ok show-disks
a) /obio/SUNW,fdtwo@0,400000
b) /iommu@0,10000000/sbus@0,10001000/espdma@5,8400000/esp@5,8800000/sd
q) NO SELECTION
Enter Selection, q to quit: b
/iommu@0,10000000/sbus@0,10001000/espdma@5,8400000/esp@5,8800000/sd has been selected.
Type ^Y ( Control-Y ) to insert it in the command line.
e.g. ok nvalias mydev ^Y
         for creating devalias mydev for
/iommu@0,10000000/sbus@0,10001000/espdma@5,8400000/esp@5,8800000/sd

Followed by a boot disk

code:

ok boot disk
Boot device: /iommu/sbus/espdma@5,8400000/esp@5,8800000/sd@3,0  File and args:
Warning: IDprom checksum error.
Warning: IDprom checksum error.
Using default machine type Sun4m/60
SunOS Release 5.5.1 Version Generic_103640-22 [UNIX(R) System V Release 4.0]
Copyright (c) 1983-1996, Sun Microsystems, Inc.
Invalid format code in IDprom.
WARNING: TOD clock not initialized -- CHECK AND RESET THE DATE!
configuring network interfaces: le0.
Hostname: bhsv51
The system is coming up.  Please wait.
checking ufs filesystems
/dev/rdsk/c0t3d0s5: is clean.
/dev/rdsk/c0t3d0s4: is clean.
NIS domainname is b+h
le0: No carrier - cable disconnected or hub link test disabled?
le0: No carrier - cable disconnected or hub link test disabled?
starting routing daemon.
starting rpc services: rpcbind keyserv kerbd done.
Nov  3 16:19:12 named[109]: starting.  named 4.9.3-P1
Nov  3 16:19:12 named[109]: primary zone "epc.net" loaded (serial 1)
Nov  3 16:19:12 named[109]: primary zone "0.0.127.in-addr.arpa" loaded (serial 1)
Nov  3 16:19:12 named[109]: cache zone "" loaded (serial 0)
starting internet domain name server.
Setting default interface for multicast: Nov  3 16:19:12 named[114]: Ready to answer queries.
add net 224.0.0.0: gateway bhsv51
syslog service starting.
Print services started.
share_nfs: /opt/bhapps/devmps/c0t4d0s0: parent-directory (/opt/bhapps) already shared
share_nfs: /opt/bhapps/devmps/c0t5d0s0: parent-directory (/opt/bhapps) already shared
share_nfs: /opt/bhapps/devmps/c0t6d0s0: parent-directory (/opt/bhapps) already shared
Scanning for tty devices.
Starting Bell & Howell primary services:
csadb epcdb tedb 611d eventd infosrv semd
Starting Bell & Howell general services:
bhfsd samba
le0: No carrier - cable disconnected or hub link test disabled?
le0: No carrier - cable disconnected or hub link test disabled?
le0: No carrier - cable disconnected or hub link test disabled?
le0: No carrier - cable disconnected or hub link test disabled?
Configuring modem services
mdmsvcinit:  faxgetty will initialize modem on port "a"
The system is ready.
le0: No carrier - cable disconnected or hub link test disabled?
le0: No carrier - cable disconnected or hub link test disabled?
le0: No carrier - cable disconnected or hub link test disabled?
Nov  3 16:21:27 bhsv51 FaxGetty[448]: MODEM /dev/cua/a appears to be wedged

And we have an OS! :woop:

Looks like SunOS 5.5.1. There is some sorta interesting stuff there like "Bell & Howell general services". It also looks to have been configured as a fax recipient maybe? :iiam:

Right now its stuck at

code:

Nov  3 16:22:40 bhsv51 FaxGetty[721]: MODEM /dev/cua/a appears to be wedged
le0: No carrier - cable disconnected or hub link test disabled?
Nov  3 16:23:53 bhsv51 FaxGetty[994]: MODEM /dev/cua/a appears to be wedged
Nov  3 16:25:06 bhsv51 FaxGetty[1271]: MODEM /dev/cua/a appears to be wedged
le0: No carrier - cable disconnected or hub link test disabled?
le0: No carrier - cable disconnected or hub link test disabled?
le0: No carrier - cable disconnected or hub link test disabled?
le0: No carrier - cable disconnected or hub link test disabled?
le0: No carrier - cable disconnected or hub link test disabled?
le0: No carrier - cable disconnected or hub link test disabled?
Nov  3 16:25:38 bhsv51 nmbd[346]: Samba is now a local master browser for workgroup BHEPC on subnet 192.92.210.255
Nov  3 16:26:19 bhsv51 FaxGetty[1552]: MODEM /dev/cua/a appears to be wedged
Nov  3 16:27:32 bhsv51 FaxGetty[1811]: MODEM /dev/cua/a appears to be wedged
Nov  3 16:28:45 bhsv51 FaxGetty[2090]: MODEM /dev/cua/a appears to be wedged
le0: No carrier - cable disconnected or hub link test disabled?
Nov  3 16:29:58 bhsv51 FaxGetty[2369]: MODEM /dev/cua/a appears to be wedged

Which just seems to be repeating. I was hoping for a login prompt. Is there a commonly accepted way to break out of these failure messages and in to an interactive prompt or login in SunOS?

Either way, I'm happy I finally have a board that works!

Beve Stuscemi fucked around with this message at 05:24 on Nov 7, 2025

# ? Nov 7, 2025 03:56

power crystals: Jun 6, 2007; Who wants a belly rub??

Beve Stuscemi posted:

All of this looks fairly normal to me, let me know if any of you spot something horrible.

I assume you saw the

quote:

The IDPROM contents are invalid

You'll want to address that. That's the only one that jumped out at me but I am hardly a sun expert.

But hell yeah always good to see these systems up and running.

# ? Nov 7, 2025 04:12

Beve Stuscemi: Jun 6, 2001

My understanding is that I cant really fix it until I get a new working PROM or I bodge a battery onto this one?

Also, in other good news, all of my RAM works, so I have 96 entire earth megabytes of RAM now

E: and it recognizes the cgsix framebuffer, even though I cant use it until I get a keyboard, and I managed to get a random plextor SCSI cdrom drive working with it so that I can install Solaris once the keyboard gets here and my framebuffer can work.

In the mean time I'm gonna try to boot to the solaris install disk so I can reset the root password on the hard drive. i figured out that just hitting CTRL-BREAK during the SunOS boot sequence kicks it to single user mode, where it asks for a root password

Beve Stuscemi fucked around with this message at 04:55 on Nov 7, 2025

# ? Nov 7, 2025 04:21

SubG: Aug 19, 2004; It's a hard world for little things.

Beve Stuscemi posted:

My understanding is that I cant really fix it until I get a new working PROM or I bodge a battery onto this one?

You can't permanently fix it until you have a working NVRAM battery. But if you manually toggle in the host ID in OBP then you should be able to boot.

Or at least if it decides to poo poo the bed it won't be because of that.

And like I said before you might just try entering the host ID, leaving the system powered for a while and then power bouncing it. It's possible that the battery isn't bad, just drained.

# ? Nov 7, 2025 06:31

eschaton: Mar 7, 2007; the knowledge knower. a wisdom imparter. irritatingly self-assertive. odorous.

Before you go erasing the disk to put something else on it, see if you can find the original Ethernet address and host ID in logs.

That way you can set it correctly for that specific machine when typing

code:

1 0 mkp
real-machine-type 1 mkp

8 2 mkp
0 3 mkp
20 4 mkp

75 5 mkp
0cd 6 mkp
39 7 mkp

2f 8 mkp
ed 9 mkp
b2 a mkp
30 b mkp

75 c mkp
0cd d mkp
39 e mkp

0 f 0 do i idprom@ xor loop f mkp

after a cold boot. (At least until you have powered NVRAM again.) (In the above, 75 0cd 39 are the last three bytes of the Ethernet address, while 2f ed b2 30 is the manufacturing date/time probably in UNIX timestamp form or something like that.)

# ? Nov 7, 2025 06:56

SubG: Aug 19, 2004; It's a hard world for little things.

eschaton posted:

Before you go erasing the disk to put something else on it, see if you can find the original Ethernet address and host ID in logs.

You can compute it from the barcode ID on the NVRAM chip.

It looks like B90E or 890E to me, although the label looks a little munged up so I'm not sure. If it's a B the MAC is 80:0:20:FF:D4:9E and the hostid is 7FFD599E. If it's an 8 they're 80:0:20:FD:B1:DE and 7FFB36DE.

# ? Nov 7, 2025 07:23

power crystals: Jun 6, 2007; Who wants a belly rub??

Beve Stuscemi posted:

My understanding is that I cant really fix it until I get a new working PROM or I bodge a battery onto this one?

Assuming that's the same type of module as my SS10 had (which it looks like at least) then it's conceptually the same as the Dallas RTC modules, but they aren't actually compatible so don't go buying any of those. There's an actual chip that stores the config data and handles related functions, which has a clock crystal and one-time use battery soldered to it, and then the whole thing is potted in epoxy. You can try to drill into the potted area to solder to the internal contacts or, in what I think is the much easier option, you blast it with hot air until the epoxy become brittle and you can just pry it apart. Necroware goes over the process here (the actual hot air bit is about halfway through). While messier this gets you a clean chip that you can desolder the dead battery from and then solder a replacement battery onto, and imo it's much harder to get wrong vs drilling in the wrong place. Glitchwrks has a replacement PCB you can solder onto the top of the chip to make the process simpler and let you use a coin cell battery so you can swap it easily when it dies. Assuming you have a hot air gun the process is super simple. Here's what mine looked like post-reassembly

...though seemingly the board I got was meant for a DIP-24 and mine was a DIP-28 so I get to get slightly creative for how to connect it

# ? Nov 7, 2025 13:47

Beve Stuscemi: Jun 6, 2001

I do have a hot air station! I'll check that video out

# ? Nov 7, 2025 14:22

McGlockenshire: Dec 16, 2005; GOLLOCKS!

You know what I just hate after attempting to collate all the information that I have and begin writing it up? You know what really just grinds my gears? What really just fucks my entire day?

I found some threads on AtariAge that I bookmarked 10 years ago, and there have been posts, and research, and discovery, and images. A bunch of people have slowly filled in a few gaps.

There's *another loving 99000*, with the downright comedic model number of TMP99000A.

Someone finally got their hands on a CPU board from the 990/10A. This CPU is the small shiny bit halfway up the right side.

This solves some discrepancies between the behavior in the 10A and the behavior of the 99110 with regards to specific memory map related instructions. I had assumed they just hijacked the opcode with external circuitry like they tell you to do, but no, it's just another loving CPU.

As if discovering one more of these things wasn't enough, there's also a TMP9900 -- that's two zeroes with no modifier, the NL denotes plastic with JDL denoting the ceramic, and, with a 1987 date code! They can occasionally be found on ebay and I suspect it's only a matter of time before someone grabs one to test.

After reading some more, I have to throw out my entire timeline! :stonk:

McGlockenshire fucked around with this message at 18:17 on Nov 8, 2025

# ? Nov 8, 2025 18:12

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# ? Nov 8, 2025 18:58

Beve Stuscemi: Jun 6, 2001

Oh man, that�s one of those things that�s awesome because there is so much more to learn, but terrible at the same time when you have to throw out work.

# ? Nov 8, 2025 18:34

The Something Awful Forums > Discussion > Serious Hardware / Software Crap > Non-x86 Platforms Thread: running in the 90s

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