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AllanGordon posted:Is this the first time intel has delayed a die shrink? Past 14nm, things get weird. Leaving the macro-scale physics world long behind.
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Jun 18, 2013 19:29
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I don't want to delay, I want leapfrog from Sandy Bride to Skylake 
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Jun 18, 2013 19:31
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22nm is what, like only 100-200 times the size of a single atom? And things start to get crazy way before getting down to the size of atoms. They've got to be running up fast against a physical barrier to any continued process shrinkage.
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Jun 18, 2013 19:52
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There's credible research stretching below 5nm, tunneling was first seen at 45nm and above, and this is all the same doom and gloom people were spreading back then.
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Jun 18, 2013 20:08
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zeroprime posted:They've got to be running up fast against a physical barrier to any continued process shrinkage. They've been running into those and working around them for a long time.
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Jun 18, 2013 20:19
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JawnV6 posted:There's credible research stretching below 5nm, tunneling was first seen at 45nm and above, and this is all the same doom and gloom people were spreading back then. Maybe you misunderstand me, maybe I just didn't give much to go on with one sentence - I'm not saying Intel can't overcome the challenges related to next process shrink, or the ones after that. At some point, though, current silicon-based process lithography, including developments as it goes, has got to hit a wall. I'm very interested in seeing what's going to happen at that point. To me it's way more exciting than it is doom and gloom. Something's gonna happen, just a question of what and when I see no reason to be pessimistic.
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Jun 18, 2013 20:21
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Agreed posted:Maybe you misunderstand me, maybe I just didn't give much to go on with one sentence - I'm not saying Intel can't overcome the challenges related to next process shrink, or the ones after that. At some point, though, current silicon-based process lithography, including developments as it goes, has got to hit a wall. I'm very interested in seeing what's going to happen at that point. Amen; sometimes the very best in creativity happens when you've got constraints (and also a fuckoff massive R&D budget). We're going to be in very exciting times soon enough.
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Jun 18, 2013 20:46
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14nm is that wall. At that point, you've got monolayers of silicon atoms in the design.
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Jun 18, 2013 20:46
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What's the most likely solution?
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Jun 18, 2013 20:52
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Stop using silicon. Which in itself is a hell of a thing.
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Jun 18, 2013 20:55
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I'm not super technical so forgive me if this is a dumb question, but once they do hit this technological barrier, is it absurd to think that from a cost perspective they might just decide that those people who really demand the fastest processors will pay more and just live with larger chips? I can't help but think that my PC case is mostly empty and if cpu's were twice the size I wouldn't ever notice once I put it together. I understand for mobile devices they'd want things small and efficient, and also to decrease production costs, but the companies who need massive teraflops will pay for the privilege until a suitable technology becomes cheaper than the old way, right? Edit: What I'm suggesting is that profit motives might actually delay that next big breakthrough instead of foster it, if it is in fact cheaper to make larger chips.
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Jun 18, 2013 21:00
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All the major players are planning on sticking to silicon through 7nm. 5nm could be a different story.
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Jun 18, 2013 21:00
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If CPUs were twice the size, their own operating heat would destroy them instantly. The density on these things is enormous and the surface area very small. The 386DX topped out at about 4W of power to do what it did. Today's equivalent performance tier uses 80 to 150W of power. Heat has been the fundamental limit of current CPU technology for almost a decade now. Without further process shrinks, we will hit a compute density wall, after which bigger chips won't solve any problems.
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Jun 18, 2013 21:06
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davebo posted:I understand for mobile devices they'd want things small and efficient, and also to decrease production costs, but the companies who need massive teraflops will pay for the privilege until a suitable technology becomes cheaper than the old way, right? Part of what's driving Intel so hard to smaller process nodes is energy efficiency, not just computational power. I don't have a link to substantiate this, but in a server farm, cooling the servers is their largest expense. Compared to that, the cost of the CPUs is incredibly minuscule. Yes, they'll want more powerful CPUs, but they also want them in a lower power envelope. Even if it costs more, the savings in power and cooling costs will more than likely make up the increase in price.
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Jun 18, 2013 21:06
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I can't remember the name of it, something like Alpha or Digital something, but I remember in the late 90's weren't there chips on a completely different architecture that didn't generate heat to work? Or am I misremembering completely? Was that a fad technology that came and went because it couldn't be adapted to scale with increasing performance? Edit: I looked through the Alpha DEC wiki but it didn't mention anything about heat. davebo fucked around with this message at 21:15 on Jun 18, 2013 |
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Jun 18, 2013 21:13
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davebo posted:I can't help but think that my PC case is mostly empty and if cpu's were twice the size I wouldn't ever notice once I put it together. Yeah, the physical space used up isn't the problem. The biggest limiting factor is the speed of light - in a 5GHz processor, each cycle lasts 0.2ns. In 0.2ns, light can travel a little over two inches. Electricity in a copper wire goes quite a bit slower. Making fast chips becomes increasingly difficult as they get bigger, because it simply takes too long for electricity to get from one end of it to the other. Edit: davebo posted:weren't there chips on a completely different architecture that didn't generate heat to work? Or am I misremembering completely? You are. The laws of thermodynamics are not compatible with such a thing. Zhentar fucked around with this message at 21:17 on Jun 18, 2013 |
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Jun 18, 2013 21:14
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The idea of an isothermic computer that somehow does what it does by changing volume drastically is really funny, though. Picturing a computer basically made of jello, floppin' around...
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Jun 18, 2013 21:25
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There may be technologies like nano-fiber-optics which produce less waste heat, but you won't get no waste heat. Or if you could shrink it far enough, combine nanotechs and coat the nanowire interconnect with thermoelectric harvesters.
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Jun 18, 2013 21:25
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SRQ posted:Stop using silicon. And completely unrealistic stacked up next to credible 5nm and below research from the same teams that have been churning it out for years. What every article wanking off about the possibility of graphene/diamond/Yet Another Substrate where a team of phd's threw a few billion around and assembled a single transistor atom by atom is that Silicon's main advantage is high volume manufacture. That's what enabled Moore's Law, that's why none of these research projects are going to sweep the market overnight. It's painful to read the dozens of articles a year about that type of research that diligently avoid going anywhere near that point.
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Jun 18, 2013 21:25
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In the future gamer quantum computers will have a furnace attached to keep them warm.
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Jun 18, 2013 21:26
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Factory Factory posted:There may be technologies like nano-fiber-optics which produce less waste heat, but you won't get no waste heat. Raises the stakes on overclocking. If you fry your processor and breathe it in, YOU DIE maybe 
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Jun 18, 2013 21:29
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When something refers to a 22nm architecture, is this the width of the depletion region in the semiconductor or is this the actual spacing between the transistors wrt each other?
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Jun 18, 2013 21:36
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canyoneer posted:Raises the stakes on overclocking. If you fry your processor and breathe it in, YOU DIE maybe Don't breathe in the magic blue smoke!
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Jun 18, 2013 21:36
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IratelyBlank posted:When something refers to a 22nm architecture, is this the width of the depletion region in the semiconductor or is this the actual spacing between the transistors wrt each other? http://en.wikipedia.org/wiki/22_nanometer Half-pitch between identical features.
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Jun 18, 2013 21:38
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I read something vague about TSMC using Germanium for 5nm, and was trying to look for some more reliable info... instead, I found this:Some idiot in 2004 posted:I don't think so! Frankly, I think that the commercial availabilty of processors and memory modules will never reach beyond the 90 manometer node.
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Jun 18, 2013 21:42
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Then we get immersion, double patterning, multigates....
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Jun 18, 2013 21:50
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Zhentar posted:I read something vague about TSMC using Germanium for 5nm, and was trying to look for some more reliable info... instead, I found this:
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Jun 18, 2013 22:06
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Zhentar posted:I read something vague about TSMC using Germanium for 5nm, and was trying to look for some more reliable info... instead, I found this: This perhaps?
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Jun 18, 2013 22:13
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Zhentar posted:I read something vague about TSMC using Germanium for 5nm, and was trying to look for some more reliable info... instead, I found this: To be fair, 90 manometers is a lot of dudes.
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Jun 18, 2013 22:21
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PCjr sidecar posted:To be fair, 90 manometers is a lot of dudes. Think of how much pressure you could measure with 90 manometers. Also: http://www.wolframalpha.com/input/?i=90+nanometers%2Fdiameter+of+a+silicon+atom At 22nm you're already talking less than 100 germanium atoms : http://www.wolframalpha.com/input/?i=22+nanometers%2Fdiameter+of+a+germanium+atom Naffer fucked around with this message at 22:26 on Jun 18, 2013 |
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Jun 18, 2013 22:23
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Yeah, that is what I read. But I wanted something more reliable (and detailed); using a silicon-germanium alloy is old hat and it seems more likely that it's some other take on silicon+germanium than that it's cutting silicon out of the picture.
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Jun 18, 2013 22:36
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If there was enough research advancement, couldn't you feasibly use graphene to make processor dies even smaller?
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Jun 19, 2013 00:16
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Carbon nanotubes are one of the candidate techs for nanoelectronics, yes. They work really nicely as CNTFETs, but nobody has figured out how to mass-produce them.
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Jun 19, 2013 00:20
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On a slightly different subject where on earth are the Haswell non-Apple laptops?
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Jun 19, 2013 00:54
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Factory Factory posted:14nm is that wall. At that point, you've got monolayers of silicon atoms in the design. I thought silicon lattice spacing was something like 500pm?
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Jun 19, 2013 01:39
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My bad, the silicon monolayer limit is for 10nm, not 14nm. It also refers to the dielectric thickness of gates specifically, which is already ~3 atoms on Intel's 22nm FinFETs. The gate length at 10nm would be ~6 nm.
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Jun 19, 2013 02:34
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To me, the fact we can build machines with billions of parts on the nanometer scale, work on timescales in the nanosecond range, last a decade or more, and can be purchased for less than a days salary makes this all seem like magic.
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Jun 19, 2013 03:14
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Factory Factory posted:14nm is that wall. At that point, you've got monolayers of silicon atoms in the design. The fun parts of reading articles are seeing how projections turn out. The conservative estimate for 16 nm process was for 2018, so process technology has kept right on pace it looks like. Supposedly we're supposed to be able to get below 5 nm using nanotubes but I do have to wonder how the signaling and state transition speed works compared to npn transistors that basically scale as distance decreases. But linear clock speed increase hardly means linear aggregate performance increase in the real world. Chuu posted:To me, the fact we can build machines with billions of parts on the nanometer scale, work on timescales in the nanosecond range, last a decade or more, and can be purchased for less than a days salary makes this all seem like magic.
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Jun 19, 2013 03:35
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Tab8715 posted:On a slightly different subject where on earth are the Haswell non-Apple laptops? I think Apple has a thing where they get them first and then the other manufacturers get them a few weeks/months down the road.
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Jun 19, 2013 04:39
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necrobobsledder posted:but for most companies just tacking on a few more blades will always be cheaper than having your developers paid like $11k / mo each spend their time optimizing for a potential few hundred times speedup. Just throwing in another piece of physical equipment is always better than hiring a human.
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Jun 19, 2013 04:53
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